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Wed, 9 Sep 2026 10:56:52 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1788944214; h=from:subject:date:message-id:to:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=BbanUwdlh/0efY1NZ4m20ixL+A4hAWes9KjfDG53tuM=; b=CBX9jFPKO+68YL1rGGQ6LVLZklYs0sihO6+x4uoIqIZOc++n8DMFBoaMoI6iFR2mULRHXG 0QwZZXD8csSJEWLGP1fTCrQAn9pKZFbvcLSu+e05EWjdE6bSrVgzW3D5Jzd2/cMGHIcdrF 9BhbuupMcw9I57z0w3/tCbQf7ClLq+e84IhBfeIDfJO5x95V4nv75rZArs9OXzM76qx7B8 4dDV/KD7ri1tp3Lqog4uHfmuuHOyntHRhW3YUa9+VoVVIM4eYCzBpbtEX21kHRgVn6q2t6 1ZcijlcbpXl/XA36/IPIBPHz41+DWfk3rbigJf6WGtY86LOkZGKBZ+nPKJ/6qw== Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Wed, 09 Sep 2026 10:56:50 +0200 Message-Id: Subject: Re: [PATCH] staging: media: tegra-video: use BIT() macro instead of bitwise shift To: "Lalit Shankar Chowdhury" , "Thierry Reding" , "Jonathan Hunter" , "Sowjanya Komatineni" , "Luca Ceresoli" , "Mauro Carvalho Chehab" , "Greg Kroah-Hartman" , "open list:TEGRA VIDEO DRIVER" , "open list:TEGRA VIDEO DRIVER" , "open list:STAGING SUBSYSTEM" , "open list" From: "Luca Ceresoli" X-Mailer: aerc 0.22.0 References: <20260907173302.23053-1-lalitshankarch@gmail.com> In-Reply-To: <20260907173302.23053-1-lalitshankarch@gmail.com> X-Last-TLS-Session-Version: TLSv1.3 Hello, On Mon Sep 7, 2026 at 7:33 PM CEST, Lalit Shankar Chowdhury wrote: > Replace the remaining instances of (1 << X) with BIT(X) to follow the > kernel coding style guidelines. > > Signed-off-by: Lalit Shankar Chowdhury > --- > drivers/staging/media/tegra-video/tegra20.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/drivers/staging/media/tegra-video/tegra20.c b/drivers/stagin= g/media/tegra-video/tegra20.c > index eb1fc5b7e2cd..2586a137d9da 100644 > --- a/drivers/staging/media/tegra-video/tegra20.c > +++ b/drivers/staging/media/tegra-video/tegra20.c > @@ -177,15 +177,15 @@ enum tegra_vi_out { > #define CSI_SKIP_PACKET_THRESHOLD(n) (((n) & 0xff) << 16) > #define TEGRA_CSI_PIXEL_STREAM_CONTROL0(n) (0x0018 + (n) * 0x2c) > #define CSI_PP_PAD_FRAME_PAD0S (0 << 28) > -#define CSI_PP_PAD_FRAME_PAD1S (1 << 28) > +#define CSI_PP_PAD_FRAME_PAD1S BIT(28) > #define CSI_PP_PAD_FRAME_NOPAD (2 << 28) > #define CSI_PP_HEADER_EC_ENABLE BIT(27) > #define CSI_PP_PAD_SHORT_LINE_PAD0S (0 << 24) > -#define CSI_PP_PAD_SHORT_LINE_PAD1S (1 << 24) > +#define CSI_PP_PAD_SHORT_LINE_PAD1S BIT(24) > #define CSI_PP_PAD_SHORT_LINE_NOPAD (2 << 24) > #define CSI_PP_EMBEDDED_DATA_EMBEDDED BIT(20) > #define CSI_PP_OUTPUT_FORMAT_ARBITRARY (0 << 16) > -#define CSI_PP_OUTPUT_FORMAT_PIXEL (1 << 16) > +#define CSI_PP_OUTPUT_FORMAT_PIXEL BIT(16) > #define CSI_PP_OUTPUT_FORMAT_PIXEL_REP (2 << 16) > #define CSI_PP_OUTPUT_FORMAT_STORE (3 << 16) > #define CSI_PP_VIRTUAL_CHANNEL_ID(n) (((n) - 1) << 14) > @@ -214,7 +214,7 @@ enum tegra_vi_out { > #define CSI_A_PHY_CIL_DISABLE 0x2 > #define CSI_A_PHY_CIL_ENABLE_MASK 0x3 > #define CSI_B_PHY_CIL_NOP (0x0 << 16) > -#define CSI_B_PHY_CIL_ENABLE (0x1 << 16) > +#define CSI_B_PHY_CIL_ENABLE BIT(16) > #define CSI_B_PHY_CIL_DISABLE (0x2 << 16) > #define CSI_B_PHY_CIL_ENABLE_MASK (0x3 << 16) > #define TEGRA_CSI_PHY_CIL_CONTROL0(n) (0x006c + (n) * 4) The same change has been rejected multiple times. See the previous discussions for the rationale: https://lore.kernel.org/all/?q=3Ds%3ABIT+dfb%3ABIT+dfn%3Adrivers%2Fstaging%= 2Fmedia%2Ftegra-video If you want to improve this code, use GENMASK() or FIELD_PREP_CONST(). Luca -- Luca Ceresoli, Bootlin Embedded Linux and Kernel engineering https://bootlin.com