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Sat, 12 Sep 2026 12:09:29 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Sat, 12 Sep 2026 12:09:28 -0700 Message-Id: From: "Alexei Starovoitov" To: "Vineet Gupta" , , , , , Cc: , , , , , , , , , , Subject: Re: [PATCH bpf-next v2 07/13] bpf: track low-32 scalar equality across sign-extending movs X-Mailer: aerc References: <20260910164635.459558-1-vineet.gupta@linux.dev> <20260910164635.459558-8-vineet.gupta@linux.dev> In-Reply-To: <20260910164635.459558-8-vineet.gupta@linux.dev> On Thu Sep 10, 2026 at 9:46 AM PDT, Vineet Gupta wrote: > The zero-extending mov records that dst shares src's low 32 bits. A 32-bi= t > sign extension shares them too -- it keeps the low half and fills the hig= h > half from bit 31 -- so the same link applies, with a different rule for > rebuilding the high bits: > > r6 =3D ... /* full 64-bit unknown */ > r7 =3D (s32)r6 /* 32-bit sign-extending mov */ > if w6 =3D=3D -1 goto ... /* taken: r6's low 32 bits are all ones */ > ... /* r7 is -1, not deduced today */ > > Add SUBREG_SEXT alongside SUBREG_ZEXT, and sext_32_to_64() alongside > zext_32_to_64() to drive the reconstruction. Both work from the base's > 32-bit range, which is what a 32-bit compare narrows. > coerce_reg_to_size_sx() cannot serve here: it reads smin/smax, which > straddle after such a compare and collapse to the full field range. > > tnum_sext() is the counterpart to tnum_cast(). Unlike a tnum_range() over > the new bounds it keeps the known low bits. > > The enum has room for the third value, so bpf_reg_state stays 80 bytes. > > Unlike the zero-extending arm, a self-mov can form a link here, but only > when src is already linked: r0 =3D (s32)r0 is how a sign-extended int ret= urn > lands. On an unlinked register there is nothing to link to, and minting a= n > id would leave the register describing itself. > > Signed-off-by: Vineet Gupta > --- > v2: was RFC 5/6. > - no forward declaration (Eduard) > - src renamed known_reg (Eduard) > - sext_32_to_64() and tnum_sext() rather than reusing > coerce_reg_to_size_sx(); the sync path needs the base's 32-bit range, > see the cover letter > - tnum_sext() keeps the known low bits a tnum_range() would drop (Eduard= ) > - a self-mov links only when src already has an id, narrower than the RF= C > > include/linux/bpf_verifier.h | 1 + > include/linux/tnum.h | 3 +++ > kernel/bpf/log.c | 2 ++ > kernel/bpf/tnum.c | 15 ++++++++++++ > kernel/bpf/verifier.c | 47 +++++++++++++++++++++++++++++++++--- > 5 files changed, 65 insertions(+), 3 deletions(-) > > diff --git a/include/linux/bpf_verifier.h b/include/linux/bpf_verifier.h > index f1b01059c5da..920c9490ecc8 100644 > --- a/include/linux/bpf_verifier.h > +++ b/include/linux/bpf_verifier.h > @@ -53,6 +53,7 @@ enum bpf_add_const { > enum bpf_subreg { > SUBREG_NONE =3D 0, > SUBREG_ZEXT, /* high bits are zero (32-bit zero-extending mov) */ > + SUBREG_SEXT, /* high bits repeat bit 31 (32-bit sign-extending mov) */ If my earlier suggestion to model SUBREG_ZEXT as add_const32 with delta =3D= =3D 0 works, then sign extension could be: enum bpf_add_const { ADD_CONST_NONE =3D 0, ADD_CONST_32, /* delta was added with a 32-bit ALU op */ /* works= as ZERO_EXTEND when delta =3D=3D 0 */ ADD_CONST_64, /* ... with a 64-bit ALU op */ SIGN_EXTEND_32, /* delta has to be =3D=3D 0 */ }; and if we really want to we can track movsx 8 and 16 too. Which might be an overkill.