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charset=UTF-8 Date: Mon, 28 Sep 2026 23:02:42 +0900 Message-Id: Cc: "Danilo Krummrich" , "Timur Tabi" , "Alistair Popple" , "Eliot Courtney" , "Zhi Wang" , "David Airlie" , "Simona Vetter" , "Bjorn Helgaas" , "Miguel Ojeda" , "Alex Gaynor" , "Boqun Feng" , "Gary Guo" , =?utf-8?q?Bj=C3=B6rn_Roy_Baron?= , "Benno Lossin" , "Andreas Hindborg" , "Alice Ryhl" , "Trevor Gross" , , "LKML" Subject: Re: [PATCH v3 14/33] gpu: nova-core: add the falcon DMA and suspend helpers for r000 boot From: "Alexandre Courbot" To: "John Hubbard" References: <20260918010719.1176945-1-jhubbard@nvidia.com> <20260918010719.1176945-15-jhubbard@nvidia.com> In-Reply-To: <20260918010719.1176945-15-jhubbard@nvidia.com> X-ClientProxiedBy: OSTP286CA0064.JPNP286.PROD.OUTLOOK.COM (2603:1096:604:226::18) To MW4PR12MB6873.namprd12.prod.outlook.com (2603:10b6:303:20c::17) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MW4PR12MB6873:EE_|DM4PR12MB8497:EE_ X-MS-Office365-Filtering-Correlation-Id: 1c66c282-308d-4903-06d8-08df1d692bd4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|376014|23010399003|366016|1800799024|10070799003|4143699003|11063799006|10067099003|5023799004|56012099006|22082099003|18002099003|3023799007; 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That's no justification for a new method, and `dma_wr` can be made capable of working with FB: change the `dma_obj` parameter to an enum type describing whether the source is FB or sysmem, with the relevant parameters for each variant as one commit, and bring the local improvements of your version (like the use of `checked_add` and support for DMA contexts) as separate commits. <...> > + /// Returns `true` if the RISC-V core has suspended. > + pub(crate) fn is_processor_suspended(&self) -> bool { > + const INTERRUPT_PROCESSOR_SUSPENDED: u32 =3D bits::bit_u32(31); > + > + self.read_mailbox0() & INTERRUPT_PROCESSOR_SUSPENDED !=3D 0 > + } > + > + /// Waits until the RISC-V core has suspended. > + /// > + /// The caller must write `MAILBOX0` before starting the core, or th= is returns as soon as it > + /// reads the previous suspend. > + /// > + /// # Errors > + /// > + /// - `ETIMEDOUT` if the core has not suspended within two seconds. > + #[expect(dead_code)] > + pub(crate) fn wait_for_processor_suspend(&self) -> Result { > + read_poll_timeout( > + || Ok(self.is_processor_suspended()), > + |suspended| *suspended, > + Delta::ZERO, > + Delta::from_secs(2), > + ) > + .map(|_| ()) > + } These two methods look firmware specific, and are only used in `boot.rs`, so I'd consider moving them there to not add ad-hoc code to this file that applies to all falcons. > + > /// Start the falcon CPU. > pub(crate) fn start(&self) -> Result<()> { > match self.pfalcon.read(regs::NV_PFALCON_FALCON_CPUCTL).alias_en= () { > diff --git a/drivers/gpu/nova-core/gsp/boot.rs b/drivers/gpu/nova-core/gs= p/boot.rs > index 4fb1b69ac9d5..8518248c9732 100644 > --- a/drivers/gpu/nova-core/gsp/boot.rs > +++ b/drivers/gpu/nova-core/gsp/boot.rs > @@ -2,7 +2,6 @@ > // SPDX-FileCopyrightText: Copyright (c) 2025-2026 NVIDIA CORPORATION & = AFFILIATES. All rights reserved. > =20 > use kernel::{ > - bits, > io::poll::read_poll_timeout, > prelude::*, > time::Delta, > @@ -94,10 +93,9 @@ fn shutdown_gsp( > cmdq.send_command(commands::UnloadingGuestDriver::new(mode))?; > =20 > // Wait until GSP signals it is suspended. > - const LIBOS_INTERRUPT_PROCESSOR_SUSPENDED: u32 =3D bits::bit_u32= (31); > read_poll_timeout( > - || Ok(gsp_falcon.read_mailbox0()), > - |&mb0| mb0 & LIBOS_INTERRUPT_PROCESSOR_SUSPENDED !=3D 0, > + || Ok(gsp_falcon.is_processor_suspended()), > + |suspended| *suspended, Yup, that bit seems to confirm the comment above. :)