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From: Jolly Shah <JOLLYS@xilinx.com>
To: Marek Szyprowski <m.szyprowski@samsung.com>,
	Geert Uytterhoeven <geert@linux-m68k.org>,
	Rob Herring <robh@kernel.org>
Cc: "Matthias Brugger" <matthias.bgg@gmail.com>,
	"Andy Gross" <andy.gross@linaro.org>,
	"Shawn Guo" <shawnguo@kernel.org>,
	"Geert Uytterhoeven" <geert+renesas@glider.be>,
	"Björn Andersson" <bjorn.andersson@linaro.org>,
	"sean.wang@mediatek.com" <sean.wang@mediatek.com>,
	"Michal Simek" <michal.simek@xilinx.com>,
	"Mark Rutland" <mark.rutland@arm.com>,
	"Rajan Vaja" <RAJANV@xilinx.com>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
	<devicetree@vger.kernel.org>,
	"Linux ARM" <linux-arm-kernel@lists.infradead.org>,
	"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH 1/2] dt-bindings: power: Add ZynqMP power domain bindings
Date: Thu, 15 Mar 2018 17:47:01 +0000	[thread overview]
Message-ID: <DM2PR0201MB07670C06F504F97EF4E4BAD4B8D00@DM2PR0201MB0767.namprd02.prod.outlook.com> (raw)
In-Reply-To: <d47ed37f-057f-b510-de70-1140dad1b7ad@samsung.com>

Hi Rob, Geert, Marek,

> -----Original Message-----
> From: Marek Szyprowski [mailto:m.szyprowski@samsung.com]
> Sent: Tuesday, March 06, 2018 12:06 AM
> To: Geert Uytterhoeven <geert@linux-m68k.org>; Rob Herring
> <robh@kernel.org>
> Cc: Jolly Shah <JOLLYS@xilinx.com>; Matthias Brugger
> <matthias.bgg@gmail.com>; Andy Gross <andy.gross@linaro.org>; Shawn Guo
> <shawnguo@kernel.org>; Geert Uytterhoeven <geert+renesas@glider.be>;
> Björn Andersson <bjorn.andersson@linaro.org>; sean.wang@mediatek.com;
> Michal Simek <michal.simek@xilinx.com>; Mark Rutland
> <mark.rutland@arm.com>; Rajan Vaja <RAJANV@xilinx.com>; open list:OPEN
> FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
> <devicetree@vger.kernel.org>; Linux ARM <linux-arm-
> kernel@lists.infradead.org>; Linux Kernel Mailing List <linux-
> kernel@vger.kernel.org>; Jolly Shah <JOLLYS@xilinx.com>
> Subject: Re: [PATCH 1/2] dt-bindings: power: Add ZynqMP power domain
> bindings
> 
> Hi All,
> 
> On 2018-03-06 08:59, Geert Uytterhoeven wrote:
> > Hi Rob, Jolly,
> >
> > On Mon, Mar 5, 2018 at 11:39 PM, Rob Herring <robh@kernel.org> wrote:
> >> On Tue, Feb 27, 2018 at 03:55:49PM -0800, Jolly Shah wrote:
> >>> Add documentation to describe ZynqMP power domain bindings.
> >>>
> >>> Signed-off-by: Jolly Shah <jollys@xilinx.com>
> >>> Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
> >>> ---
> >>>   .../devicetree/bindings/power/zynqmp-genpd.txt     | 46
> ++++++++++++++++++++++
> >>>   1 file changed, 46 insertions(+)
> >>>   create mode 100644
> >>> Documentation/devicetree/bindings/power/zynqmp-genpd.txt
> >>>
> >>> diff --git
> >>> a/Documentation/devicetree/bindings/power/zynqmp-genpd.txt
> >>> b/Documentation/devicetree/bindings/power/zynqmp-genpd.txt
> >>> new file mode 100644
> >>> index 0000000..25f9711
> >>> --- /dev/null
> >>> +++ b/Documentation/devicetree/bindings/power/zynqmp-genpd.txt
> >>> +This node contains a number of subnodes, each representing a single
> >>> +PM domain that PM domain consumer devices reference.
> >>> +
> >>> +== PM Domain Nodes ==
> >>> +
> >>> +Required properties:
> >>> + - #power-domain-cells: Number of cells in a PM domain specifier. Must be
> 0.
> >>> + - pd-id: List of domain identifiers of as defined by platform firmware.
> These
> >>> +       identifiers are passed to the PM firmware.
> >>> +
> >>> +Example:
> >>> +     zynqmp-genpd {
> >>> +             compatible = "xlnx,zynqmp-genpd";
> >> What's the control interface for controlling the domains?
> >>> +
> >>> +             pd_usb0: pd-usb0 {
> >>> +                     pd-id = <22>;
> >>> +                     #power-domain-cells = <0>;
> >> There's no need for all these sub nodes. Make #power-domain-cells 1
> >> and put the id in the cell value.
> > That was my first reaction, too...
> >>> +             };
> >>> +
> >>> +             pd_sata: pd-sata {
> >>> +                     pd-id = <28>;
> >>> +                     #power-domain-cells = <0>;
> >>> +             };
> >>> +
> >>> +             pd_gpu: pd-gpu {
> >>> +                     pd-id = <58 20 21>;
> > ... until I saw the above.
> > Controlling the GPU power area requires controlling 3 physical areas?
> >
> > However, doing it this way may bite you in the future, if a need
> > arises to control a subset. And what about power up/down order?
> 
> What about defining 3 separate domains and arranging them in parent-child
> relationship? generic power domains already supports that and this allows to
> nicely define the power on/off order.
> 
> >>> +                     #power-domain-cells = <0x0>;
> >>> +             };
> >>> +     };
> 

I agree it should be arranged in as parent child order to control subset or control order. Will incorporate those changes in next version.

> Best regards
> --
> Marek Szyprowski, PhD
> Samsung R&D Institute Poland

  reply	other threads:[~2018-03-15 17:47 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-27 23:55 [PATCH 0/2] drivers: soc: xilinx: Add support for ZynqMP power domain driver Jolly Shah
2018-02-27 23:55 ` [PATCH 1/2] dt-bindings: power: Add ZynqMP power domain bindings Jolly Shah
2018-03-05 22:39   ` Rob Herring
2018-03-06  7:59     ` Geert Uytterhoeven
2018-03-06  8:06       ` Marek Szyprowski
2018-03-15 17:47         ` Jolly Shah [this message]
2018-05-17 21:10           ` Jolly Shah
2018-05-18  6:30             ` Marek Szyprowski
2018-05-18 21:18               ` Jolly Shah
2018-07-20 16:57               ` Jolly Shah
2018-02-27 23:55 ` [PATCH 2/2] drivers: soc: xilinx: Add ZynqMP power domain driver Jolly Shah
2018-03-02 16:40   ` kbuild test robot

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