From: Appana Durga Kedareswara Rao <appanad@xilinx.com>
To: Radhey Shyam Pandey <radheys@xilinx.com>,
"dan.j.williams@intel.com" <dan.j.williams@intel.com>,
"vkoul@kernel.org" <vkoul@kernel.org>,
Michal Simek <michals@xilinx.com>,
"lars@metafoo.de" <lars@metafoo.de>,
Radhey Shyam Pandey <radheys@xilinx.com>
Cc: "dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH 1/3] dmaengine: xilinx_dma: Refactor axidma channel allocation
Date: Tue, 21 Aug 2018 07:31:11 +0000 [thread overview]
Message-ID: <DM5PR02MB21872434D0054888E8CA1EC5DC310@DM5PR02MB2187.namprd02.prod.outlook.com> (raw)
In-Reply-To: <1532688639-32230-2-git-send-email-radhey.shyam.pandey@xilinx.com>
Hi,
Thanks for the patch...
>
> In axidma alloc_chan_resources merge BD and cyclic BD allocation.
>
> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-for-series: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
Regards,
Kedar.
> ---
> drivers/dma/xilinx/xilinx_dma.c | 36 ++++++++++++++++++------------------
> 1 files changed, 18 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/dma/xilinx/xilinx_dma.c
> b/drivers/dma/xilinx/xilinx_dma.c index c124423..06d1632 100644
> --- a/drivers/dma/xilinx/xilinx_dma.c
> +++ b/drivers/dma/xilinx/xilinx_dma.c
> @@ -887,6 +887,24 @@ static int xilinx_dma_alloc_chan_resources(struct
> dma_chan *dchan)
> chan->id);
> return -ENOMEM;
> }
> + /*
> + * For cyclic DMA mode we need to program the tail
> Descriptor
> + * register with a value which is not a part of the BD chain
> + * so allocating a desc segment during channel allocation for
> + * programming tail descriptor.
> + */
> + chan->cyclic_seg_v = dma_zalloc_coherent(chan->dev,
> + sizeof(*chan->cyclic_seg_v),
> + &chan->cyclic_seg_p, GFP_KERNEL);
> + if (!chan->cyclic_seg_v) {
> + dev_err(chan->dev,
> + "unable to allocate desc segment for cyclic
> DMA\n");
> + dma_free_coherent(chan->dev, sizeof(*chan->seg_v)
> *
> + XILINX_DMA_NUM_DESCS, chan->seg_v,
> + chan->seg_p);
> + return -ENOMEM;
> + }
> + chan->cyclic_seg_v->phys = chan->cyclic_seg_p;
>
> for (i = 0; i < XILINX_DMA_NUM_DESCS; i++) {
> chan->seg_v[i].hw.next_desc =
> @@ -922,24 +940,6 @@ static int xilinx_dma_alloc_chan_resources(struct
> dma_chan *dchan)
> return -ENOMEM;
> }
>
> - if (chan->xdev->dma_config->dmatype == XDMA_TYPE_AXIDMA) {
> - /*
> - * For cyclic DMA mode we need to program the tail
> Descriptor
> - * register with a value which is not a part of the BD chain
> - * so allocating a desc segment during channel allocation for
> - * programming tail descriptor.
> - */
> - chan->cyclic_seg_v = dma_zalloc_coherent(chan->dev,
> - sizeof(*chan->cyclic_seg_v),
> - &chan->cyclic_seg_p, GFP_KERNEL);
> - if (!chan->cyclic_seg_v) {
> - dev_err(chan->dev,
> - "unable to allocate desc segment for cyclic
> DMA\n");
> - return -ENOMEM;
> - }
> - chan->cyclic_seg_v->phys = chan->cyclic_seg_p;
> - }
> -
> dma_cookie_init(dchan);
>
> if (chan->xdev->dma_config->dmatype == XDMA_TYPE_AXIDMA) {
> --
> 1.7.1
next prev parent reply other threads:[~2018-08-21 7:31 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-27 10:50 [PATCH 0/3] dmaengine: xilinx_dma: Minor fix and refactoring Radhey Shyam Pandey
2018-07-27 10:50 ` [PATCH 1/3] dmaengine: xilinx_dma: Refactor axidma channel allocation Radhey Shyam Pandey
2018-08-21 7:31 ` Appana Durga Kedareswara Rao [this message]
2018-07-27 10:50 ` [PATCH 2/3] dmaengine: xilinx_dma: Refactor axidma channel validation Radhey Shyam Pandey
2018-08-21 15:50 ` Vinod
2018-08-28 13:03 ` Radhey Shyam Pandey
2018-07-27 10:50 ` [PATCH 3/3] dmaengine: xilinx_dma: Fix 64-bit simple CDMA transfer Radhey Shyam Pandey
2018-08-21 15:55 ` Vinod
2018-08-28 14:03 ` Radhey Shyam Pandey
2018-08-29 4:01 ` Vinod
2018-08-29 17:05 ` Radhey Shyam Pandey
2018-09-07 12:08 ` Radhey Shyam Pandey
2018-09-11 7:41 ` Vinod
2018-09-11 9:31 ` Radhey Shyam Pandey
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