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received-spf: None (protection.outlook.com: marvell.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: SRoGWEj5aD8q2/R5tIxXC3FNq7qBRdoxADa4uP0QJ8oRd8THMlUq8KEmSbc+/rt/yTiuX8E97yZ7xR7uK/scD7mJertRGxBQPvxsCoPwtPX4EApqvIbyMGsuKTbccTeQH9ltAyMX1eAKPhnf3Dis2XSt1TvCYery4go/5684SCWV3hqvna4LJ6yJil1+3kI/6T0uhZpAY6vkMtT1km3v8+SxZpB16JPgr+GKHNWIeHMXv6TJ+q8f6V4oUXcBN/qk3VjrVnxo8EkJSzBDGHkQZHXT7KKNlSIdY1s2/Klul7Tw+aIln1Zi3IvFMDNk7ADxxPGIOzPKbt3cxWu5CXOU2tVzcZcW4L8mzsOSWjoHf6L5/xvBUnJQwCKEzTru9Mw5W18Z/eSMwyA5LmVCNtEzrFG9EpNKc/9t/fek+qTTqCU= Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: 0b998e9c-df81-42f4-ed4e-08d69594e86e X-MS-Exchange-CrossTenant-originalarrivaltime: 18 Feb 2019 11:33:30.5605 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR18MB1291 X-OriginatorOrg: marvell.com X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2019-02-18_08:,, signatures=0 X-Proofpoint-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=729 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1902180088 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: Russell King - ARM Linux admin > Sent: Monday, February 18, 2019 1:28 PM > To: Stefan Chulski > Cc: Antoine Tenart ; davem@davemloft.net; > netdev@vger.kernel.org; linux-kernel@vger.kernel.org; > thomas.petazzoni@bootlin.com; maxime.chevallier@bootlin.com; > gregory.clement@bootlin.com; miquel.raynal@bootlin.com; Nadav Haklai > ; Yan Markman ; > mw@semihalf.com > Subject: Re: [EXT] Re: [PATCH net-next 10/13] net: mvpp2: reset the XPCS > while reconfiguring the serdes lanes >=20 > Hi Stefan, >=20 > On Mon, Feb 18, 2019 at 11:08:34AM +0000, Stefan Chulski wrote: > > HW recommendation upon Serdes reconfiguration are the following: > > > > 1. Disable port(CTRL0_REG - in XLG/GMAC) 2. Put port in reset (both > > XLG/GMAC) 3. For KR - put in reset MPCS (MAC control clock, RX SD > > clock, TX SD clock), XPSC is RXAUI/XAUI clock domain 4. Power down > > Serdes lane > > > > Do reconfiguration of Serdes. > > > > 5. Enable Serdes lane > > 6. Disable MPCS reset for KR > > 7. Disable port reset (both XLG/GMAC) > > 8. Enable port (both XLG/GMAC) >=20 > For clarity, presumably either the XLG or the GMAC should be released fro= m > reset and enabled at any one time depending on the configured mode, but > never both together? Yes. Only one of them the XLG or the GMAC ,depending on the configured mode. Best Regards.