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dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nvidia.com; Received: from DS0PR12MB6413.namprd12.prod.outlook.com (2603:10b6:8:ce::10) by DS0PR12MB9398.namprd12.prod.outlook.com (2603:10b6:8:1b3::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.592.9; Thu, 5 Nov 2026 12:50:45 +0000 Received: from DS0PR12MB6413.namprd12.prod.outlook.com ([fe80::e82a:6673:4142:37fa]) by DS0PR12MB6413.namprd12.prod.outlook.com ([fe80::e82a:6673:4142:37fa%5]) with mapi id 15.21.0592.009; Thu, 5 Nov 2026 12:50:45 +0000 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Thu, 05 Nov 2026 21:50:41 +0900 Message-Id: Cc: "John Hubbard" , "Alistair Popple" , "Timur Tabi" , "Eliot Courtney" , "Zhi Wang" , , , Subject: Re: [PATCH 4/7] gpu: nova-core: run the generic bootloader from its own type From: "Eliot Courtney" To: "Alexandre Courbot" , "Danilo Krummrich" , "Alice Ryhl" , "David Airlie" , "Simona Vetter" X-Mailer: aerc 0.22.0-0-gc2f86b7abde3 References: <20261103-r000-fw-v1-0-e3d38fc130e3@nvidia.com> <20261103-r000-fw-v1-4-e3d38fc130e3@nvidia.com> In-Reply-To: <20261103-r000-fw-v1-4-e3d38fc130e3@nvidia.com> X-ClientProxiedBy: TYCP286CA0223.JPNP286.PROD.OUTLOOK.COM (2603:1096:400:3c5::11) To DS0PR12MB6413.namprd12.prod.outlook.com (2603:10b6:8:ce::10) X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS0PR12MB6413:EE_|DS0PR12MB9398:EE_ X-MS-Office365-Filtering-Correlation-Id: 89d1adf7-0538-4a7e-70c8-08df3b3b687b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|23010399003|10070799003|376014|366016|1800799024|6133799003|10067099003|22082099003|18002099003|3023799007|56012099006|4143699003|11063799006|261028144727099003|261026121527099003|261022105027099003|261102123227099003|261021123027099003|261009223027099003|261022075727099003|261021121427099003|261026140227099003; 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The FWSEC wrapper did that through its own > implementation of the PIO loading traits. The r000 load-and-execute > bootloader event will need to do the same thing. > > Give the generic bootloader a run method, which pairs it with the > descriptor that it receives, loads the pair by PIO, starts the falcon > with the given MAILBOX0 value and returns the mailboxes once the falcon > has halted. This will allow the FWSEC and r000 load-and-execute > bootloader event to share the same code. > > No functional changes. > > Assisted-by: LLM > Signed-off-by: John Hubbard > Co-developed-by: Alexandre Courbot > Signed-off-by: Alexandre Courbot > --- > drivers/gpu/nova-core/firmware/fwsec/bootloader.rs | 55 ++------------- > drivers/gpu/nova-core/firmware/gen_bootloader.rs | 80 ++++++++++++++++= +++++- > 2 files changed, 84 insertions(+), 51 deletions(-) > > diff --git a/drivers/gpu/nova-core/firmware/fwsec/bootloader.rs b/drivers= /gpu/nova-core/firmware/fwsec/bootloader.rs > index ad798ec5645a..c7bb877fcf20 100644 > --- a/drivers/gpu/nova-core/firmware/fwsec/bootloader.rs > +++ b/drivers/gpu/nova-core/firmware/fwsec/bootloader.rs > @@ -16,22 +16,16 @@ > register::Array, > Io, // > }, > - prelude::*, > - transmute::AsBytes, > + prelude::*, // > }; > =20 > use crate::{ > falcon::{ > gsp::Gsp, > Falcon, > - FalconBromParams, > FalconDmaLoadable, > FalconFbifMemType, > - FalconFbifTarget, > - FalconFirmware, > - FalconPioDmemLoadTarget, > - FalconPioImemLoadTarget, > - FalconPioLoadable, // > + FalconFbifTarget, // > }, > firmware::{ > fwsec::FwsecFirmware, > @@ -50,11 +44,10 @@ > pub(crate) struct FwsecFirmwareWithBl<'a> { > /// DMA object the bootloader will copy the firmware from. > _firmware_dma: Coherent<'a, [u8]>, > + /// The bootloader that copies the firmware. nit: doc change looks like it should be in a different patch > bootloader: GenericBootloader, > /// Descriptor to be loaded into DMEM for the bootloader to read. > dmem_desc: BootloaderDmemDescV2, > - /// BROM parameters of the loaded firmware. > - brom_params: FalconBromParams, > } > =20 > impl<'a> FwsecFirmwareWithBl<'a> { > @@ -127,7 +120,6 @@ pub(crate) fn new( > _firmware_dma: firmware_dma, > bootloader, > dmem_desc, > - brom_params: firmware.brom_params(), > }) > } > =20 > @@ -136,13 +128,9 @@ pub(crate) fn new( > /// The bootloader will load the FWSEC firmware and then execute it.= This function returns > /// after FWSEC has reached completion. > pub(crate) fn run(&self, dev: &Device, falcon: &Falco= n<'_, Gsp>) -> Result<()> { > - // Reset falcon, load the firmware, and run it. > falcon > .reset() > .inspect_err(|e| dev_err!(dev, "Failed to reset GSP falcon: = {:?}\n", e))?; > - falcon > - .pio_load(self) > - .inspect_err(|e| dev_err!(dev, "Failed to load FWSEC firmwar= e: {:?}\n", e))?; > =20 > // Configure DMA index for the bootloader to fetch the FWSEC fir= mware from system memory. > falcon.pfalcon.update( Does it make sense for the generic bootloader to also do this step (falcon.pfalcon.update())? This appears to be something that's part of what the generic bootloader expects to be done no matter what, and it's doable just from `BootloaderDmemDescV2` which it already gets. Modulo answer to above question, Reviewed-by: Eliot Courtney