From: "Junhui Liu" <junhui.liu@pigmoral.tech>
To: "Enzo Adriano" <enzo.adriano.code@gmail.com>, <junhui.liu@pigmoral.tech>
Cc: "Stephen Boyd" <sboyd@kernel.org>,
"Brian Masney" <bmasney+clk@redhat.com>,
"Jerome Brunet" <jbrunet+clk@baylibre.com>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Chen-Yu Tsai" <wens@kernel.org>,
"Jernej Skrabec" <jernej.skrabec@gmail.com>,
"Samuel Holland" <samuel@sholland.org>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Paul Walmsley" <pjw@kernel.org>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Alexandre Ghiti" <alex@ghiti.fr>,
"Richard Cochran" <richardcochran@gmail.com>,
<linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-sunxi@lists.linux.dev>, <linux-kernel@vger.kernel.org>,
<linux-riscv@lists.infradead.org>, <netdev@vger.kernel.org>,
"Jerome Brunet" <jbrunet@baylibre.com>,
"Andre Przywara" <andre.przywara@arm.com>,
"Norman Herms" <dockseed@proton.me>,
"Vinicius Pedrosa" <vinicius.eduardo.pedrosa@gmail.com>
Subject: Re: [PATCH v6 3/8] clk: sunxi-ng: a733: Add PRCM CCU
Date: Mon, 09 Nov 2026 12:55:07 +0800 [thread overview]
Message-ID: <DMQEUUHANG74.30N8VT6UGHO0M@pigmoral.tech> (raw)
In-Reply-To: <20261103-a733-ccu-v6-fw-clocks@gmail.com>
Hi Enzo,
On Tue Nov 3, 2026 at 9:33 AM CST, Enzo Adriano wrote:
> Hi Junhui,
>
> On Fri, Oct 09, 2026 at 11:52:08PM +0800, Junhui Liu wrote:
>> +static SUNXI_CCU_P_DATA_WITH_MUX_GATE(r_cpu_timer0, "r-timer0", r_apb_parents, 0x100,
>> + 1, 3, /* P */
>> + 4, 3, /* mux */
>> + BIT(0), /* gate */
>> + 0);
>
> On a Cubie A7S with vendor boot firmware, v6 reaches a Linux shell but
> stalls at warm reboot. The system-controller firmware uses the R-domain
> timer and mailboxes without Linux clock consumers, so disabling these
> clocks as unused can leave its services unavailable.
>
> Could you consider marking r-timer0, bus-r-timer, bus-r-riscv and
> bus-r-msgbox here, and bus-msgbox0 in 7/8, CLK_IS_CRITICAL in the next
> revision? My standalone patch has the diff, firmware references and
> board results:
> https://lore.kernel.org/r/20261031020640-263f7b05-a7s-clock@gmail.com
I'd prefer not to mark these clocks as critical just for the vendor
firmware. You can see my reply in v5:
https://lore.kernel.org/linux-sunxi/DLYAHDTH3129.3AYF0OSHL8RJ8@pigmoral.tech/
Since you've already submitted a separate patch adding these critical
flags, I'll leave that to you. If the maintainers agree that these
clocks should be marked critical, your patch can be picked up.
>
> With those five flags, two RAM boots of my A7S integration completed
> warm reboots without clk_ignore_unused, and all five clocks reported
> enabled. That is one board on vendor firmware. Vinicius reported native
> PSCI reboot working on an A7Z without local critical flags on
> bus-r-riscv and bus-r-msgbox, with TF-A and U-Boot built from source, so
> the boot chain may matter. I haven't tested suspend, or shown that each
> of the five flags is needed on its own.
>
> Thanks,
> Enzo
--
Best regards,
Junhui Liu
next prev parent reply other threads:[~2026-11-09 4:55 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-09 15:52 [PATCH v6 0/8] clk: sunxi-ng: Add support for Allwinner A733 CCU and PRCM Junhui Liu
2026-10-09 15:52 ` [PATCH v6 1/8] dt-bindings: clk: sun60i-a733-ccu: Add Allwinner A733 support Junhui Liu
2026-10-09 15:52 ` [PATCH v6 2/8] clk: sunxi-ng: sdm: Add dual patterns support Junhui Liu
2026-10-09 15:52 ` [PATCH v6 3/8] clk: sunxi-ng: a733: Add PRCM CCU Junhui Liu
2026-11-03 1:33 ` Enzo Adriano
2026-11-09 4:55 ` Junhui Liu [this message]
2026-10-09 15:52 ` [PATCH v6 4/8] clk: sunxi-ng: a733: Add PLL clocks support Junhui Liu
2026-10-09 15:52 ` [PATCH v6 5/8] clk: sunxi-ng: a733: Add bus " Junhui Liu
2026-10-09 15:52 ` [PATCH v6 6/8] clk: sunxi-ng: a733: Add mod " Junhui Liu
2026-11-02 15:32 ` Andre Przywara
2026-11-03 12:11 ` Vinicius Pedrosa
2026-11-09 3:16 ` Junhui Liu
2026-10-09 15:52 ` [PATCH v6 7/8] clk: sunxi-ng: a733: Add bus clock gates Junhui Liu
2026-10-09 15:52 ` [PATCH v6 8/8] clk: sunxi-ng: a733: Add reset lines Junhui Liu
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