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07:23:33.6689 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: MXy9Q0Zfk4D7UBu4Gw6FVppoQ4Spw9djPOOhFWvbilpDQWPQWhS7E5kCzzxeq24CF+ME3MUCJ3uLNvjjpwRBpA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN7PPF34483F4BA On Sat Nov 7, 2026 at 6:48 PM JST, Alexandre Courbot wrote: > The r000 boot protocol has a load-and-execute event in which GSP-RM asks > the driver to load a Heavy-Secured binary from framebuffer memory into > the GSP falcon's memory by DMA in order to run it. > > Nova-core's falcon DMA loading method currently only supports loading > from a DMA object that the driver has allocated, so there is no way to > copy an image from framebuffer memory that an event supplied. > > Address this by making the source of a falcon DMA transfer an enum, > which can be either a DMA object, or a GPU framebuffer address. > > The framebuffer address source has no user yet, but will be used by the > r000 boot protocol. > > Signed-off-by: Alexandre Courbot > --- > drivers/gpu/nova-core/falcon.rs | 65 ++++++++++++++++++++++++++---------= ------ > 1 file changed, 42 insertions(+), 23 deletions(-) > > diff --git a/drivers/gpu/nova-core/falcon.rs b/drivers/gpu/nova-core/falc= on.rs > index 00da664887fc..b63265abd263 100644 > --- a/drivers/gpu/nova-core/falcon.rs > +++ b/drivers/gpu/nova-core/falcon.rs > @@ -140,6 +140,15 @@ pub(crate) enum FalconMem { > Dmem { tag: bool }, > } > =20 > +/// Where a falcon DMA transfer reads from. > +pub(crate) enum FalconDmaSource<'a> { > + /// A DMA object in system memory. > + Sysmem(&'a Coherent<'a, [u8]>), > + /// GPU framebuffer memory at physical address `base`. > + #[expect(dead_code)] > + Framebuffer { base: u64 }, > +} > + > bounded_enum! { > /// Defines the Framebuffer Interface (FBIF) aperture type. > /// This determines the memory type for external memory access durin= g a DMA transfer, which is > @@ -544,13 +553,10 @@ pub(crate) fn with_fbif_transcfg( > Ok(result) > } > =20 > - /// Perform a DMA write according to `load_offsets` from `dma_obj` i= nto the falcon's > - /// `target_mem`. > - /// > - /// `sec` is set if the loaded firmware is expected to run in secure= mode. > + /// Perform a DMA write according to `load_offsets` from `src` into = the falcon's `target_mem`. > fn dma_wr( > &self, > - dma_obj: &Coherent<'_, [u8]>, > + src: FalconDmaSource<'_>, > target_mem: FalconMem, > load_offsets: FalconDmaLoadTarget, > ) -> Result { > @@ -563,23 +569,32 @@ fn dma_wr( > // For IMEM and tagged DMEM, we want to use the start offset as = a virtual address tag for > // each page, since addresses in the firmware (and the boot vect= or) are virtual. > // > - // For untagged DMEM, the start offset is folded into the DMA ba= se. > - let (fb_offset, base_offset) =3D match target_mem { > - FalconMem::ImemSecure | FalconMem::ImemNonSecure | FalconMem= ::Dmem { tag: true } =3D> { > - (load_offsets.src_start, 0) > + // For untagged DMEM in a DMA object, the start offset is folded= into the DMA base. For a > + // framebuffer address, the DMA engine adds the start offset to = the address. > + let (fb_offset, dma_base) =3D match src { > + FalconDmaSource::Sysmem(dma_obj) =3D> { > + let (fb_offset, base_offset) =3D match target_mem { > + FalconMem::ImemSecure > + | FalconMem::ImemNonSecure > + | FalconMem::Dmem { tag: true } =3D> (load_offsets.s= rc_start, 0), > + FalconMem::Dmem { tag: false } =3D> { > + (0, usize::from_safe_cast(load_offsets.src_start= )) > + } > + }; > + > + // Upper limit of transfer is `(num_transfers * DMA_LEN)= + load_offsets.src_start`. > + let dma_end =3D num_transfers > + .checked_mul(DMA_LEN) > + .and_then(|size| size.checked_add(load_offsets.src_s= tart)) > + .map(usize::from_safe_cast) > + .ok_or(EOVERFLOW)?; > + > + ( > + fb_offset, > + io_project!(dma_obj, [try: base_offset..dma_end]).dm= a_address(), > + ) > } > - FalconMem::Dmem { tag: false } =3D> (0, usize::from_safe_cas= t(load_offsets.src_start)), > - }; > - > - let dma_base =3D { > - // Upper limit of transfer is `(num_transfers * DMA_LEN) + l= oad_offsets.src_start`. > - let dma_end =3D num_transfers > - .checked_mul(DMA_LEN) > - .and_then(|size| size.checked_add(load_offsets.src_start= )) > - .map(usize::from_safe_cast) > - .ok_or(EOVERFLOW)?; > - > - io_project!(dma_obj, [try: base_offset..dma_end]).dma_addres= s() > + FalconDmaSource::Framebuffer { base } =3D> (load_offsets.src= _start, base), > }; I think this code is simplifiable. The `Sysmem` branch computes some offset= s based on `target_mem`. But I don't see why this has to be specific to that branch. What we could do (and what openrm does afaict) is just split that o= ut, for example: ``` let (fb_offset, base_offset) =3D match target_mem { FalconMem::ImemSecure | FalconMem::ImemNonSecure | FalconMem::Dmem { ta= g: true } =3D> { (load_offsets.src_start, 0) } FalconMem::Dmem { tag: false } =3D> (0, usize::from_safe_cast(load_offs= ets.src_start)), }; let dma_base =3D match src { FalconDmaSource::Sysmem(dma_obj) =3D> { let dma_end =3D num_transfers .checked_mul(DMA_LEN) .and_then(|size| size.checked_add(load_offsets.src_start)) .map(usize::from_safe_cast) .ok_or(EOVERFLOW)?; io_project!(dma_obj, [try: base_offset..dma_end]).dma_address() } FalconDmaSource::Framebuffer { base } =3D> base .checked_add(u64::from_safe_cast(base_offset)) .ok_or(EOVERFLOW)?, }; ``` Alternatively I think the following is simpler where you just always pass t= he base of the DMA region and use the offset param (NV_PFALCON_FALCON_DMATRFFBOFFS), but it's not what openrm does. That is, tag=3D=3Dfalse case it doesn't matter (?) how the offset is split between `fb_offset` and `base_offset` is so might as well make it match the other c= ases: ``` let dma_base =3D match src { FalconDmaSource::Sysmem(dma_obj) =3D> { let dma_end =3D num_transfers .checked_mul(DMA_LEN) .and_then(|size| size.checked_add(load_offsets.src_start)) .map(usize::from_safe_cast) .ok_or(EOVERFLOW)?; io_project!(dma_obj, [try: 0..dma_end]).dma_address() } FalconDmaSource::Framebuffer { base } =3D> base, }; let dma_offset =3D load_offsets.src_start; ```