On Tue, 10 Nov 2026 08:46:07 +0100, Frédéric Mahé wrote:
> The BPI-F3 has an RTL8852BS module whose Bluetooth part is on UART2,
> with hardware flow control. GPIO 63 powers Bluetooth on and GPIO 64
> is the device wake line.
>
> The firmware config switches the UART to 1.5 Mbaud, so take the UART2
> clock from the 48 MHz slow_uart2 clock.
slow_uart2 is a programmable divider (MPMU_SUCCR_1), not a fixed
48 MHz clock. Its rate is whatever the bootloader left there.

[...]
> diff --git a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
> index 58035d886..280adc9dc 100644
> --- a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
> +++ b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
> @@ -383,6 +383,21 @@ &uart0 {
>  	status = "okay";
>  };
>  
> +&uart2 {
> +	assigned-clocks = <&syscon_apbc CLK_UART2>;
> +	assigned-clock-parents = <&syscon_mpmu CLK_SLOW_UART2>;
Please add CLK_SLOW_UART2 to assigned-clocks and set it explicitly:

	assigned-clock-rates = <0>, <48000000>;

> +	pinctrl-names = "default";
> +	pinctrl-0 = <&uart2_0_cfg>, <&uart2_0_cts_rts_cfg>;
> +	uart-has-rtscts;
> +	status = "okay";
> +
> +	bluetooth {
> +		compatible = "realtek,rtl8852bs-bt", "realtek,rtl8822cs-bt";
> +		enable-gpios = <&gpio K1_GPIO(63) GPIO_ACTIVE_HIGH>;
> +		device-wake-gpios = <&gpio K1_GPIO(64) GPIO_ACTIVE_HIGH>;
> +	};
> +};

-- 
Troy Mitchell