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This means > that on msgq v2, the slot can jump backwards when the counters wrap. > For example: > > (2^32 - 2) % 63 =3D=3D 2 > (2^32 - 1) % 63 =3D=3D 3 > 0 % 63 =3D=3D 0 (slot 0 instead of slot 4) > > The writer can then overwrite slots before the reader has read them. > > Increase `MSGQ_NUM_PAGES` to 64 and check at compile time that > `MSGQ_NUM_PAGES` divides 2^32. Have we tested that this was also working on msgq v0? > > Signed-off-by: Eliot Courtney > --- > drivers/gpu/nova-core/gsp/cmdq.rs | 10 +++++++++- > 1 file changed, 9 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/nova-core/gsp/cmdq.rs b/drivers/gpu/nova-core/gs= p/cmdq.rs > index 33074bb53e8c..240ab42db557 100644 > --- a/drivers/gpu/nova-core/gsp/cmdq.rs > +++ b/drivers/gpu/nova-core/gsp/cmdq.rs > @@ -84,7 +84,15 @@ trait CommandElement { > } > =20 > /// Number of GSP pages making the [`Msgq`]. > -pub(crate) const MSGQ_NUM_PAGES: u32 =3D 0x3f; > +pub(crate) const MSGQ_NUM_PAGES: u32 =3D 64; > + > +// From version 2 of the msgq protocol, the queue pointers increase > +// monotonically in `u32` counters until they wrap. If `MSGQ_NUM_PAGES` = does not > +// divide `1 << 32`, then the slot, `counter % MSGQ_NUM_PAGES`, can jump > +// backwards when wrapping, which could overwrite slots that still need = to be > +// read. So, require that the last counter value, `u32::MAX`, maps to th= e last > +// slot. That's a pretty convoluted way to say the number of slots must be a power of 2 representable as a u32. :) > +static_assert!(u32::MAX % MSGQ_NUM_PAGES =3D=3D MSGQ_NUM_PAGES - 1); Same here, can't we use `MSGQ_NUM_PAGES.is_power_of_two()`?