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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DS7PR12MB6070.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 82fb2e0c-dd77-4462-d4b4-08dd20121ce3 X-MS-Exchange-CrossTenant-originalarrivaltime: 19 Dec 2024 09:47:12.2369 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: cBPWEdxH6UseA8GqTV0UPcZnBjzDmd6AmPmQlewkLRxEN5y3VHQP29iJh0A644xP X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4146 Hi Yilun, > -----Original Message----- > From: Xu Yilun > Sent: Tuesday, December 10, 2024 2:34 PM > To: Manne, Nava kishore > Cc: git (AMD-Xilinx) ; mdf@kernel.org; hao.wu@intel.com; > yilun.xu@intel.com; trix@redhat.com; robh@kernel.org; saravanak@google.co= m; > linux-kernel@vger.kernel.org; linux-fpga@vger.kernel.org; > devicetree@vger.kernel.org > Subject: Re: [RFC v2 1/1] fpga-region: Add generic IOCTL interface for ru= ntime > FPGA programming >=20 > On Wed, Dec 04, 2024 at 06:40:18AM +0000, Manne, Nava kishore wrote: > > Hi Yilun, > > > > > -----Original Message----- > > > From: Xu Yilun > > > Sent: Wednesday, November 27, 2024 7:20 AM > > > To: Manne, Nava kishore > > > Cc: git (AMD-Xilinx) ; mdf@kernel.org; > > > hao.wu@intel.com; yilun.xu@intel.com; trix@redhat.com; > > > robh@kernel.org; saravanak@google.com; linux-kernel@vger.kernel.org; > > > linux-fpga@vger.kernel.org; devicetree@vger.kernel.org > > > Subject: Re: [RFC v2 1/1] fpga-region: Add generic IOCTL interface > > > for runtime FPGA programming > > > > > > > > > + * struct fpga_region_ops - ops for low level FPGA region ops > > > > > > +for device > > > > > > + * enumeration/removal > > > > > > + * @region_status: returns the FPGA region status > > > > > > + * @region_config_enumeration: Configure and enumerate the FPG= A > region. > > > > > > + * @region_remove: Remove all devices within the FPGA region > > > > > > + * (which are added as part of the enumeration). > > > > > > + */ > > > > > > +struct fpga_region_ops { > > > > > > + int (*region_status)(struct fpga_region *region); > > > > > > + int (*region_config_enumeration)(struct fpga_region *region, > > > > > > + struct fpga_region_config_info > *config_info); > > > > > > > > > > My current concern is still about this combined API, it just > > > > > offloads all work to low level, but we have some common flows. > > > > > That's why we introduce a common FPGA reprograming API. > > > > > > > > > > I didn't see issue about the vendor specific pre configuration. > > > > > They are generally needed to initialize the struct > > > > > fpga_image_info, which is a common structure for > fpga_region_program_fpga(). > > > > > > > > > > For port IDs(AFU) inputs for DFL, I think it could also be > > > > > changed (Don't have to be implemented in this patchset). > > > > > Previously DFL provides an uAPI for the whole device, so it > > > > > needs a port_id input to position which fpga_region within the > > > > > device for programming. But now, we are introducing a per > > > > > fpga_region programming interface, IIUC port_id > > > should not be needed anymore. > > > > > > > > > > The combined API is truly simple for leveraging the existing > > > > > of-fpga-region overlay apply mechanism. But IMHO that flow > > > > > doesn't fit our new uAPI well. That flow is to adapt the generic > > > > > configfs overlay interface, which comes to a dead end as you ment= ioned. > > > > > > > > > > My gut feeling for the generic programing flow should be: > > > > > > > > > > 1. Program the image to HW. > > > > > 2. Enumerate the programmed image (apply the DT overlay) > > > > > > > > > > Why we have to: > > > > > > > > > > 1. Start enumeration. > > > > > 2. On pre enumeration, programe the image. > > > > > 3. Real enumeration. > > > > > > > > > > > > > I agree with the approach of leveraging vendor-specific callbacks > > > > to handle the distinct phases of the FPGA programming process. > > > > Here's the proposed flow. > > > > > > > > Pre-Configuration: > > > > A vendor-specific callback extracts the required pre-configuration > > > > details and initializes struct fpga_image_info. This ensures that > > > > all vendor-specific > > > > > > Since we need to construct the fpga_image_info, initialize multiple > > > field as needed, I'm wondering if configfs could be a solution for th= e uAPI? > > > > > > > A configfs uAPI isn't necessary, we can manage this using the proposed = IOCTL > flow. > > The POC code looks as follows. >=20 > I prefer more to configfs cause it provides standard FS way to create the > fpga_image_info object, e.g. which attributes are visible for OF/non-OF r= egion, which > attributes come from image blob and can only be RO, etc. >=20 > Of couse ioctl() could achieve the same goal but would add much more spec= ific rules > (maybe flags/types) for user to follow. >=20 Agreed. Using ConfigFS is preferable because it provides a standardized fil= esystem interface for creating and managing the fpga_image_info object. The proposed new user interface is outlined as follows: # Mount ConfigFS filesystem mount -t configfs none /sys/kernel/config # Upload Configuration and Load the Bitstream for the Targeted FPGA Region. Configuration File Upload: Upload the configuration file containing the necessary metadata or settings= required for configuring the FPGA region. This file may vary based on the vendor and= includes important details specific to the vendor's requirements. Vendor-Specific Callback:=20 A vendor-specific callback function extracts the relevant configuration dat= a from the file. The format and contents of the configuration file can differ between vendor= s. The callback then initializes the struct fpga_image_info, ensuring all vendor-specific r= equirements are satisfied. Device-Specific Considerations: For Open Firmware (OF) devices, fpga.dtbo files are used instead of fpga_co= nfig files. These .dtbo files contain all necessary information to populate the fpga_im= age_info. For non-OF devices, a vendor specific fpga.config files are used to provide= the required data for initializing the fpga_image_info. FPGA Configuration: Once the configuration details are extracted and the fpga_image_info struct= ure is initialized, the FPGA can be programmed accordingly. echo "config_file" > /sys/kernel/config/fpga//config # Check the status of "region" cat /sys/kernel/config/fpga//status # Remove "region" echo "remove" > /sys/kernel/config/fpga//remove Looking forward to your feedback. Regards, Navakishore.