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To: Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-phy@lists.infradead.org, andersson@kernel.org, bhelgaas@google.com, conor+dt@kernel.org, devicetree@vger.kernel.org, lumag@kernel.org, kishon@kernel.org, konradybcio@kernel.org, krzk+dt@kernel.org, kw@linux.com, lpieralisi@kernel.org, manivannan.sadhasivam@linaro.org, p.zabel@pengutronix.de, quic_nsekar@quicinc.com, robh@kernel.org, robimarko@gmail.com, vkoul@kernel.org, quic_srichara@quicinc.com References: <20250314055644.32705-1-george.moussalem@outlook.com> <20250314-greedy-tested-flamingo-59ae28@krzk-bin> <6843e66c-d85c-4af0-8b49-773803825381@kernel.org> Content-Language: en-US From: George Moussalem In-Reply-To: <6843e66c-d85c-4af0-8b49-773803825381@kernel.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: DX0P273CA0087.AREP273.PROD.OUTLOOK.COM (2603:1086:300:5d::9) To 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=?utf-8?B?d2tGL05aTlBQeW1oeG4vRjN2T2VBL0dSTGVEVEp4a2FvSk0yaUg2Rlk3enVT?= =?utf-8?B?M2o1V21hdXkybzhqdzQzQUhTV0pHQVBkWWVRWDk2S1l2OFhmczU0cnRzT1NS?= =?utf-8?B?eFdERENzNjllKzNEZUw0bnlQblVDaHUwbTNMb1FaS3pjb2ZQKy94RktKVGVU?= =?utf-8?Q?JjgCsTPxZ4p9VTd7jSa5?= X-OriginatorOrg: outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 5fa032df-2e68-4d13-f9bd-08dd651779ee X-MS-Exchange-CrossTenant-AuthSource: DS7PR19MB8883.namprd19.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Mar 2025 05:49:26.7461 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 84df9e7f-e9f6-40af-b435-aaaaaaaaaaaa X-MS-Exchange-CrossTenant-RMS-PersistedConsumerOrg: 00000000-0000-0000-0000-000000000000 X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR19MB5099 On 3/14/25 13:20, Krzysztof Kozlowski wrote: > On 14/03/2025 09:42, George Moussalem wrote: >>>> + reg-names: >>>> + items: >>>> + - const: parf # Qualcomm specific registers >>>> + - const: dbi # DesignWare PCIe registers >>>> + - const: elbi # External local bus interface registers >>>> + - const: atu # ATU address space >>>> + - const: config # PCIe configuration space >>> >>> Keep the same order as other IPQ, so dbi+elbi+atu+parf+config. Same for >>> everything else, so standard rule applies: devices are supposed to use >>> ordering from existing variants. >>> >>> There is some huge mess with IPQ PCI bindings, including things on the >>> list. Apparently it became my job to oversee Qualcomm PCI work... well, >>> I do not have time for that, so rather I expect contributors to >>> cooperate in this matter. >>> >>> Don't throw your patches over the wall. >>> >>> If you need to rework the patch, take the ownership and rework it. >>> >>> >> >> Thanks Krzysztof. I did reorder them deliberately based on unit >> addresses as discussed also in other threads about IPQ9574 and IPQ5332 >> as I thought it would be neater that way. I'll change it back, reuse > > Which discusses were that? What were the reasons to start with parf? > I based the reordering on this patch so assumed that was the direction (at that time): https://patchwork.kernel.org/project/linux-pci/patch/20250128062708.573662-5-quic_varada@quicinc.com/ This was then reverted in subsequent version so will reorder as suggested. > >> other sections in the dt as much as possible, and follow your guidance >> instead. > > Best regards, > Krzysztof Best regards, George