From: Alan Cox <alan@lxorguk.ukuu.org.uk>
To: manfred@colorfullife.com (Manfred Spraul)
Cc: ebiederm@xmission.com (Eric W. Biederman), linux-kernel@vger.kernel.org
Subject: Re: SMP processor rework help needed
Date: Mon, 15 Oct 2001 22:39:34 +0100 (BST) [thread overview]
Message-ID: <E15tFSQ-0003SY-00@the-village.bc.nu> (raw)
In-Reply-To: <3BCB19E0.64322276@colorfullife.com> from "Manfred Spraul" at Oct 15, 2001 07:16:16 PM
> Huh?
>
> 24547202.pdf: (i.e. volume 3 of the ia32 SDM)
> <<<<<<<<
> The APIC ID register is loaded at power up by sampling configuration
> data that is driven onto pins of the processor. For the Pentium 4 and P6
> family processors, pins A11# and A12# and pins BR0# through BR3# are
> sampled; for the Pentium processor, pins BE0# through BE3# are sampled.
> <<<<<<
Dual Pentium at least has a mode where the boot processor is decided by a
boot time resolution - its valuable for HA uses. I'm not sure if it affects
the APIC ident
next prev parent reply other threads:[~2001-10-15 21:33 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2001-10-15 17:16 Manfred Spraul
2001-10-15 21:39 ` Alan Cox [this message]
-- strict thread matches above, loose matches on Subject: below --
2001-10-14 20:23 Tommy Faasen
2001-10-14 20:33 ` Andi Kleen
2001-10-14 20:50 ` Gerhard Mack
2001-10-14 21:07 ` Andi Kleen
2001-10-15 15:20 ` Eric W. Biederman
2001-10-14 22:09 ` Tommy Faasen
2001-10-15 5:07 ` Pascal Schmidt
2001-10-15 21:25 ` Bill Davidsen
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