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Tue, 24 Feb 2026 21:40:38 +0000 (UTC) Date: Tue, 24 Feb 2026 21:40:28 +0000 From: Borislav Petkov To: Dave Hansen , Kim Phillips , linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-coco@lists.linux.dev, x86@kernel.org CC: Sean Christopherson , Paolo Bonzini , K Prateek Nayak , Nikunj A Dadhania , Tom Lendacky , Michael Roth , Borislav Petkov , Naveen Rao , David Kaplan , Pawan Gupta , stable@kernel.org Subject: =?US-ASCII?Q?Re=3A_=5BPATCH_1/3=5D_cpu/bugs=3A_Fix_selectin?= =?US-ASCII?Q?g_Automatic_IBRS_using_spectre=5Fv2=3Deibrs?= User-Agent: K-9 Mail for Android In-Reply-To: <6b3b0c86-99eb-406d-b88d-3d71613bef9e@intel.com> References: <20260224180157.725159-1-kim.phillips@amd.com> <20260224180157.725159-2-kim.phillips@amd.com> <6b3b0c86-99eb-406d-b88d-3d71613bef9e@intel.com> Message-ID: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On February 24, 2026 6:22:36 PM UTC, Dave Hansen wrote: >On 2/24/26 10:01, Kim Phillips wrote: >> @@ -2136,7 +2136,8 @@ static void __init spectre_v2_select_mitigation(v= oid) >> if ((spectre_v2_cmd =3D=3D SPECTRE_V2_CMD_EIBRS || >> spectre_v2_cmd =3D=3D SPECTRE_V2_CMD_EIBRS_LFENCE || >> spectre_v2_cmd =3D=3D SPECTRE_V2_CMD_EIBRS_RETPOLINE) && >> - !boot_cpu_has(X86_FEATURE_IBRS_ENHANCED)) { >> + !(boot_cpu_has(X86_FEATURE_IBRS_ENHANCED) || >> + boot_cpu_has(X86_FEATURE_AUTOIBRS))) { >> pr_err("EIBRS selected but CPU doesn't have Enhanced or Automatic IB= RS=2E Switching to AUTO select\n"); >> spectre_v2_cmd =3D SPECTRE_V2_CMD_AUTO; >> } > >Didn't we agree to just use the "Intel feature" name? See this existing >code: > >> /* >> * AMD's AutoIBRS is equivalent to Intel's eIBRS - use the Inte= l feature >> * flag and protect from vendor-specific bugs via the whitelist= =2E >> * >> * Don't use AutoIBRS when SNP is enabled because it degrades h= ost >> * userspace indirect branch performance=2E >> */ >> if ((x86_arch_cap_msr & ARCH_CAP_IBRS_ALL) || >> (cpu_has(c, X86_FEATURE_AUTOIBRS) && >> !cpu_feature_enabled(X86_FEATURE_SEV_SNP))) { >> setup_force_cpu_cap(X86_FEATURE_IBRS_ENHANCED); >> if (!cpu_matches(cpu_vuln_whitelist, NO_EIBRS_PBRSB) && >> !(x86_arch_cap_msr & ARCH_CAP_PBRSB_NO)) >> setup_force_cpu_bug(X86_BUG_EIBRS_PBRSB); >> } > >You're probably not seeing X86_FEATURE_IBRS_ENHANCED because it doesn't >get forced under SNP=2E Set the Intel flag somewhere in the SNP init path=2E=2E=2E? --=20 Small device=2E Typos and formatting crap