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charset=us-ascii Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 (Mac OS X Mail 16.0 \(3826.600.51.1.1\)) Subject: Re: [PATCH v2 03/19] gpu: nova-core: register: allow fields named `offset` From: Daniel Almeida In-Reply-To: <20250718-nova-regs-v2-3-7b6a762aa1cd@nvidia.com> Date: Fri, 25 Jul 2025 13:20:29 -0300 Cc: Danilo Krummrich , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Beata Michalska , nouveau@lists.freedesktop.org, dri-devel@lists.freedesktop.org, rust-for-linux@vger.kernel.org, linux-kernel@vger.kernel.org, Timur Tabi Content-Transfer-Encoding: quoted-printable Message-Id: References: <20250718-nova-regs-v2-0-7b6a762aa1cd@nvidia.com> <20250718-nova-regs-v2-3-7b6a762aa1cd@nvidia.com> To: Alexandre Courbot X-Mailer: Apple Mail (2.3826.600.51.1.1) X-ZohoMailClient: External > On 18 Jul 2025, at 04:26, Alexandre Courbot = wrote: >=20 > `offset` is a common field name, yet using it triggers a build error = due > to the conflict between the uppercased field constant (which becomes > `OFFSET` in this case) containing the bitrange of the field, and the > `OFFSET` constant constaining the offset of the register. >=20 > Fix this by adding `_RANGE` the field's range constant to avoid the > name collision. >=20 > Reported-by: Timur Tabi > Signed-off-by: Alexandre Courbot > --- > drivers/gpu/nova-core/regs.rs | 4 ++-- > drivers/gpu/nova-core/regs/macros.rs | 2 +- > 2 files changed, 3 insertions(+), 3 deletions(-) >=20 > diff --git a/drivers/gpu/nova-core/regs.rs = b/drivers/gpu/nova-core/regs.rs > index = 5ccfb61f850ac961be55841416ca21775309ea32..2df784f704d57b6ef31486afa0121c5c= d83bb8b9 100644 > --- a/drivers/gpu/nova-core/regs.rs > +++ b/drivers/gpu/nova-core/regs.rs > @@ -28,7 +28,7 @@ impl NV_PMC_BOOT_0 { > /// Combines `architecture_0` and `architecture_1` to obtain the = architecture of the chip. > pub(crate) fn architecture(self) -> Result { > Architecture::try_from( > - self.architecture_0() | (self.architecture_1() << = Self::ARCHITECTURE_0.len()), > + self.architecture_0() | (self.architecture_1() << = Self::ARCHITECTURE_0_RANGE.len()), > ) > } >=20 > @@ -36,7 +36,7 @@ pub(crate) fn architecture(self) -> = Result { > pub(crate) fn chipset(self) -> Result { > self.architecture() > .map(|arch| { > - ((arch as u32) << Self::IMPLEMENTATION.len()) | = self.implementation() as u32 > + ((arch as u32) << Self::IMPLEMENTATION_RANGE.len()) | = self.implementation() as u32 > }) > .and_then(Chipset::try_from) > } > diff --git a/drivers/gpu/nova-core/regs/macros.rs = b/drivers/gpu/nova-core/regs/macros.rs > index = 93e9055d5ebd5f78ea534aafd44d884da0fce345..d015a9f8a0b01afe1ff5093991845864= aa81665e 100644 > --- a/drivers/gpu/nova-core/regs/macros.rs > +++ b/drivers/gpu/nova-core/regs/macros.rs > @@ -278,7 +278,7 @@ impl $name { > { $process:expr } $to_type:ty =3D> $res_type:ty $(, = $comment:literal)?; > ) =3D> { > ::kernel::macros::paste!( > - const [<$field:upper>]: ::core::ops::RangeInclusive =3D = $lo..=3D$hi; > + const [<$field:upper _RANGE>]: = ::core::ops::RangeInclusive =3D $lo..=3D$hi; > const [<$field:upper _MASK>]: u32 =3D ((((1 << $hi) - 1) << 1) = + 1) - ((1 << $lo) - 1); > const [<$field:upper _SHIFT>]: u32 =3D Self::[<$field:upper = _MASK>].trailing_zeros(); > ); >=20 > --=20 > 2.50.1 >=20 >=20 Reviewed-by: Daniel Almeida =