From: "Arınç ÜNAL" <arinc.unal@arinc9.com>
To: Vladimir Oltean <olteanv@gmail.com>
Cc: Daniel Golle <daniel@makrotopia.org>,
Landen Chao <Landen.Chao@mediatek.com>,
DENG Qingfang <dqfext@gmail.com>,
Sean Wang <sean.wang@mediatek.com>, Andrew Lunn <andrew@lunn.ch>,
Florian Fainelli <f.fainelli@gmail.com>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
Russell King <linux@armlinux.org.uk>,
Frank Wunderlich <frank-w@public-files.de>,
Bartel Eerdekens <bartel.eerdekens@constell8.be>,
mithat.guner@xeront.com, erkin.bozoglu@xeront.com,
linux-kernel@vger.kernel.org, netdev@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org
Subject: Re: [PATCH net v4 1/7] net: dsa: mt7530: fix trapping frames with multiple CPU ports on MT7531
Date: Thu, 15 Jun 2023 00:40:47 +0300 [thread overview]
Message-ID: <F03D45C7-04E9-4534-AC28-2C6F76EAF3F4@arinc9.com> (raw)
In-Reply-To: <20230614211352.sls7ao5swiqjgtjz@skbuf>
On 15 June 2023 00:13:52 EEST, Vladimir Oltean <olteanv@gmail.com> wrote:
>On Wed, Jun 14, 2023 at 11:56:44PM +0300, Arınç ÜNAL wrote:
>> On 14.06.2023 22:43, Vladimir Oltean wrote:
>> > On Mon, Jun 12, 2023 at 10:59:39AM +0300, arinc9.unal@gmail.com wrote:
>> > > From: Arınç ÜNAL <arinc.unal@arinc9.com>
>> > >
>> > > Every bit of the CPU port bitmap for MT7531 and the switch on the MT7988
>> > > SoC represents a CPU port to trap frames to. These switches trap frames
>> > > received from a user port to the CPU port that is affine to the user port
>> > > from which the frames are received.
>> > >
>> > > Currently, only the bit that corresponds to the first found CPU port is set
>> > > on the bitmap. When multiple CPU ports are being used, the trapped frames
>> > > from the user ports not affine to the first CPU port will be dropped as the
>> > > other CPU port is not set on the bitmap. The switch on the MT7988 SoC is
>> > > not affected as there's only one port to be used as a CPU port.
>> > >
>> > > To fix this, introduce the MT7531_CPU_PMAP macro to individually set the
>> > > bits of the CPU port bitmap. Set the CPU port bitmap for MT7531 and the
>> > > switch on the MT7988 SoC on mt753x_cpu_port_enable() which runs on a loop
>> > > for each CPU port.
>> > >
>> > > Add a comment to explain frame trapping for these switches.
>> > >
>> > > According to the document MT7531 Reference Manual for Development Board
>> > > v1.0, the MT7531_CPU_PMAP bits are unset after reset so no need to clear it
>> > > beforehand. Since there's currently no public document for the switch on
>> > > the MT7988 SoC, I assume this is also the case for this switch.
>> > >
>> > > Fixes: c288575f7810 ("net: dsa: mt7530: Add the support of MT7531 switch")
>> > > Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
>> > > ---
>> >
>> > Would you agree that this is just preparatory work for change "net: dsa:
>> > introduce preferred_default_local_cpu_port and use on MT7530" and not a
>> > fix to an existing problem in the code base?
>>
>> Makes sense. Pre-preferred_default_local_cpu_port patch, there isn't a case
>> where there's a user port affine to a CPU port that is not enabled on the
>> CPU port bitmap. So yeah, this is just preparatory work for "net: dsa:
>> introduce preferred_default_local_cpu_port and use on MT7530".
>>
>> So how do I change the patch to reflect this?
>>
>> Arınç
>
>net: dsa: mt7530: set all CPU ports in MT7531_CPU_PMAP
>
>MT7531_CPU_PMAP represents the destination port mask for trapped-to-CPU
>frames (further restricted by PCR_MATRIX).
>
>Currently the driver sets the first CPU port as the single port in this
>bit mask, which works fine regardless of whether the device tree defines
>port 5, 6 or 5+6 as CPU ports. This is because the logic coincides with
>DSA's logic of picking the first CPU port as the CPU port that all user
>ports are affine to, by default.
>
>An upcoming change would like to influence DSA's selection of the
>default CPU port to no longer be the first one, and in that case, this
>logic needs adaptation.
>
>Since there is no observed leakage or duplication of frames if all CPU
>ports are defined in this bit mask, simply include them all.
>
>Note that there is no Fixes tag
Thanks a lot for making it easier for me.
Arınç
next prev parent reply other threads:[~2023-06-14 21:41 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-12 7:59 [PATCH net v4 0/7] net: dsa: mt7530: fix multiple CPU ports, BPDU and LLDP handling arinc9.unal
2023-06-12 7:59 ` [PATCH net v4 1/7] net: dsa: mt7530: fix trapping frames with multiple CPU ports on MT7531 arinc9.unal
2023-06-14 19:43 ` Vladimir Oltean
2023-06-14 20:56 ` Arınç ÜNAL
2023-06-14 21:13 ` Vladimir Oltean
2023-06-14 21:40 ` Arınç ÜNAL [this message]
2023-06-12 7:59 ` [PATCH net v4 2/7] net: dsa: mt7530: fix trapping frames with multiple CPU ports on MT7530 arinc9.unal
2023-06-12 21:09 ` Russell King (Oracle)
2023-06-12 21:11 ` Russell King (Oracle)
2023-06-13 17:16 ` Arınç ÜNAL
2023-06-12 7:59 ` [PATCH net v4 3/7] net: dsa: mt7530: fix trapping frames on non-MT7621 SoC MT7530 switch arinc9.unal
2023-06-12 21:14 ` Russell King (Oracle)
2023-06-13 17:20 ` Arınç ÜNAL
2023-06-14 20:13 ` Vladimir Oltean
2023-06-14 20:59 ` Arınç ÜNAL
2023-06-14 21:19 ` Vladimir Oltean
2023-06-12 7:59 ` [PATCH net v4 4/7] net: dsa: mt7530: fix handling of BPDUs on " arinc9.unal
2023-06-14 20:50 ` Vladimir Oltean
2023-06-14 21:05 ` Arınç ÜNAL
2023-06-14 21:16 ` Vladimir Oltean
2023-06-14 21:43 ` Arınç ÜNAL
2023-06-12 7:59 ` [PATCH net v4 5/7] net: dsa: mt7530: fix handling of LLDP frames arinc9.unal
2023-06-14 16:35 ` Russell King (Oracle)
2023-06-14 20:48 ` Arınç ÜNAL
2023-06-14 16:42 ` Russell King (Oracle)
2023-06-14 20:52 ` Arınç ÜNAL
2023-06-14 21:43 ` Vladimir Oltean
2023-06-14 21:50 ` Arınç ÜNAL
2023-06-15 12:45 ` Bartel Eerdekens
2023-06-16 1:53 ` Arınç ÜNAL
2023-06-16 2:24 ` Arınç ÜNAL
2023-06-12 7:59 ` [PATCH net v4 6/7] net: dsa: introduce preferred_default_local_cpu_port and use on MT7530 arinc9.unal
2023-06-14 21:51 ` Vladimir Oltean
2023-06-12 7:59 ` [PATCH net v4 7/7] MAINTAINERS: add me as maintainer of MEDIATEK SWITCH DRIVER arinc9.unal
2023-06-12 11:37 ` [PATCH net v4 0/7] net: dsa: mt7530: fix multiple CPU ports, BPDU and LLDP handling Russell King (Oracle)
2023-06-12 20:52 ` Russell King (Oracle)
2023-06-12 21:30 ` Andrew Lunn
2023-06-13 16:51 ` Arınç ÜNAL
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=F03D45C7-04E9-4534-AC28-2C6F76EAF3F4@arinc9.com \
--to=arinc.unal@arinc9.com \
--cc=Landen.Chao@mediatek.com \
--cc=andrew@lunn.ch \
--cc=angelogioacchino.delregno@collabora.com \
--cc=bartel.eerdekens@constell8.be \
--cc=daniel@makrotopia.org \
--cc=davem@davemloft.net \
--cc=dqfext@gmail.com \
--cc=edumazet@google.com \
--cc=erkin.bozoglu@xeront.com \
--cc=f.fainelli@gmail.com \
--cc=frank-w@public-files.de \
--cc=kuba@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mediatek@lists.infradead.org \
--cc=linux@armlinux.org.uk \
--cc=matthias.bgg@gmail.com \
--cc=mithat.guner@xeront.com \
--cc=netdev@vger.kernel.org \
--cc=olteanv@gmail.com \
--cc=pabeni@redhat.com \
--cc=sean.wang@mediatek.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®