Re: [PATCH] clk: microchip: Add check for devm_kzalloc

[Conor Dooley <conor@kernel.org>]

On 8 December 2022 08:40:25 GMT+01:00, Jiasheng Jiang <jiasheng@iscas.ac.cn> wrote:
>As devm_kzalloc may return NULL pointer, the return value should
>be checked and return error if it fails since NULL is a invalid
>value of "name" .
>
>Fixes: d39fb172760e ("clk: microchip: add PolarFire SoC fabric clock support")
>Signed-off-by: Jiasheng Jiang <jiasheng@iscas.ac.cn>

Someone already sent this patch, but thanks.

>---
> drivers/clk/microchip/clk-mpfs-ccc.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
>diff --git a/drivers/clk/microchip/clk-mpfs-ccc.c b/drivers/clk/microchip/clk-mpfs-ccc.c
>index 7be028dced63..32aae880a14f 100644
>--- a/drivers/clk/microchip/clk-mpfs-ccc.c
>+++ b/drivers/clk/microchip/clk-mpfs-ccc.c
>@@ -166,6 +166,9 @@ static int mpfs_ccc_register_outputs(struct device *dev, struct mpfs_ccc_out_hw_
> 		struct mpfs_ccc_out_hw_clock *out_hw = &out_hws[i];
> 		char *name = devm_kzalloc(dev, 23, GFP_KERNEL);
> 
>+		if (!name)
>+			return -ENOMEM;
>+
> 		snprintf(name, 23, "%s_out%u", parent->name, i);
> 		out_hw->divider.hw.init = CLK_HW_INIT_HW(name, &parent->hw, &clk_divider_ops, 0);
> 		out_hw->divider.reg = data->pll_base[i / MPFS_CCC_OUTPUTS_PER_PLL] +
>@@ -200,6 +203,9 @@ static int mpfs_ccc_register_plls(struct device *dev, struct mpfs_ccc_pll_hw_clo
> 		struct mpfs_ccc_pll_hw_clock *pll_hw = &pll_hws[i];
> 		char *name = devm_kzalloc(dev, 18, GFP_KERNEL);
> 
>+		if (!name)
>+			return -ENOMEM;
>+
> 		pll_hw->base = data->pll_base[i];
> 		snprintf(name, 18, "ccc%s_pll%u", strchrnul(dev->of_node->full_name, '@'), i);
> 		pll_hw->name = (const char *)name;