mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Kumar Gala <galak@codeaurora.org>
To: Stephen Boyd <sboyd@codeaurora.org>
Cc: linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-msm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Mark Rutland <mark.rutland@arm.com>,
	devicetree@vger.kernel.org
Subject: Re: [PATCH v2 4/6] edac: Document Krait L1/L2 EDAC driver binding
Date: Wed, 30 Oct 2013 16:56:19 -0500	[thread overview]
Message-ID: <F38814D8-723E-4A41-839D-DEE351738017@codeaurora.org> (raw)
In-Reply-To: <52717EA5.6030208@codeaurora.org>


On Oct 30, 2013, at 4:48 PM, Stephen Boyd wrote:

> On 10/30/13 14:45, Kumar Gala wrote:
>> On Oct 30, 2013, at 3:25 PM, Stephen Boyd wrote:
>> 
>>> @@ -75,3 +77,50 @@ Example:
>>> 			reg = <0x101>;
>>> 		};
>>> 	};
>>> +
>>> +If the compatible string contains "qcom,krait" there shall be an interrupts
>>> +property containing the L1/CPU error interrupt number. There shall also be an
>> 'also be a'
> 
> ok
> 
>> 
>>> +l2-cache node containing the following properties:
>> Is the L1 interrupt not per core L1 cache (even if they are OR together at PIC)?
> 
> Yes it is per CPU. That is what the 0xf part of the cpus interrupts
> property is showing.

Than why not have it in each cpu node?

>>> 
>>> + - compatible: Shall contain at least "cache"
>>> + - cache-level: Must be 2
>>> + - interrupts: Shall contain the L2 error interrupt
>>> +
>>> +Example:
>>> +
>>> +	cpus {
>>> +		#address-cells = <1>;
>>> +		#size-cells = <0>;
>>> +		interrupts = <1 9 0xf04>;
>>> +		compatible = "qcom,krait";
>>> 


- k

-- 
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation


  reply	other threads:[~2013-10-30 21:56 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-10-30 20:25 [PATCH v2 0/6] Krait L1/L2 EDAC driver Stephen Boyd
2013-10-30 20:25 ` [PATCH v2 1/6] edac: Don't try to cancel workqueue when it's never setup Stephen Boyd
2013-10-30 20:25 ` [PATCH v2 2/6] genirq: export percpu irq functions for module usage Stephen Boyd
2013-10-30 20:25 ` [PATCH v2 3/6] ARM: Add Krait L2 accessor functions Stephen Boyd
2013-10-30 20:25 ` [PATCH v2 4/6] edac: Document Krait L1/L2 EDAC driver binding Stephen Boyd
2013-10-30 21:45   ` Kumar Gala
2013-10-30 21:48     ` Stephen Boyd
2013-10-30 21:56       ` Kumar Gala [this message]
2013-10-30 21:58         ` Stephen Boyd
2013-10-30 22:02           ` Kumar Gala
2013-10-31 17:30             ` Stephen Boyd
2013-10-31 17:44               ` Kumar Gala
2013-10-30 20:25 ` [PATCH v2 5/6] edac: Add support for Krait CPU cache error detection Stephen Boyd
2013-10-30 20:25 ` [PATCH v2 6/6] ARM: dts: msm: Add Krait CPU/L2 nodes Stephen Boyd
2013-10-30 20:27   ` David Brown

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=F38814D8-723E-4A41-839D-DEE351738017@codeaurora.org \
    --to=galak@codeaurora.org \
    --cc=devicetree@vger.kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-edac@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mark.rutland@arm.com \
    --cc=sboyd@codeaurora.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®