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Wed, 19 Nov 2025 15:19:56 +0000 Received: from GV2PR04MB11740.eurprd04.prod.outlook.com ([fe80::ca5f:7e1c:a67a:a490]) by GV2PR04MB11740.eurprd04.prod.outlook.com ([fe80::ca5f:7e1c:a67a:a490%5]) with mapi id 15.20.9343.009; Wed, 19 Nov 2025 15:19:55 +0000 From: Claudiu Manoil To: Wei Fang , Vladimir Oltean , Clark Wang , "andrew+netdev@lunn.ch" , "davem@davemloft.net" , "edumazet@google.com" , "kuba@kernel.org" , "pabeni@redhat.com" CC: Aziz Sellami , "imx@lists.linux.dev" , "netdev@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: RE: [PATCH v3 net-next 3/3] net: enetc: update the base address of port MDIO registers for ENETC v4 Thread-Topic: [PATCH v3 net-next 3/3] net: enetc: update the base address of port MDIO registers for ENETC v4 Thread-Index: AQHcWUIfcG/AAR+5SUOvC7U/oxYhW7T6HKqg Date: Wed, 19 Nov 2025 15:19:55 +0000 Message-ID: References: <20251119102557.1041881-1-wei.fang@nxp.com> <20251119102557.1041881-4-wei.fang@nxp.com> In-Reply-To: <20251119102557.1041881-4-wei.fang@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: GV2PR04MB11740.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: b6cdae18-0211-4329-887d-08de277f1885 X-MS-Exchange-CrossTenant-originalarrivaltime: 19 Nov 2025 15:19:55.8799 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: a0/IqxtLpfPJs+ija49pGpNbDWxgAofnqBo8pANP9lUViU97Y3IW6wJdt7btCOmOKgmmv9WJ+9orgaS6jHAaFQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: GV4PR04MB11425 > -----Original Message----- > From: Wei Fang > Sent: Wednesday, November 19, 2025 12:26 PM [...] > Subject: [PATCH v3 net-next 3/3] net: enetc: update the base address of p= ort > MDIO registers for ENETC v4 >=20 > Each ENETC has a set of external MDIO registers to access its external > PHY based on its port EMDIO bus, these registers are used for MDIO bus > access, such as setting the PHY address, PHY register address and value, > read or write operations, C22 or C45 format, etc. The base address of > this set of registers has been modified in ENETC v4 and is different > from that in ENETC v1. So the base address needs to be updated so that > ENETC v4 can use port MDIO to manage its own external PHY. >=20 > Additionally, if ENETC has the PCS layer, it also has a set of internal > MDIO registers for managing its on-die PHY (PCS/Serdes). The base address > of this set of registers is also different from that of ENETC v1, so the > base address also needs to be updated so that ENETC v4 can support the > management of on-die PHY through the internal MDIO bus. >=20 > Signed-off-by: Wei Fang > --- Reviewed-by: Claudiu Manoil