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[92.40.202.89]) by smtp.gmail.com with ESMTPSA id x14-20020adff0ce000000b00210396b2eaesm12229149wro.45.2022.06.04.04.28.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 04 Jun 2022 04:28:37 -0700 (PDT) References: <20220603135149.11570-1-aidanmacdonald.0x0@gmail.com> <20220603155600.3eab9890@xps-13> From: Aidan MacDonald To: Miquel Raynal Cc: richard@nod.at, vigneshr@ti.com, linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] mtd: spinand: Add support for ATO25D1GA Date: Sat, 04 Jun 2022 12:26:57 +0100 In-reply-to: <20220603155600.3eab9890@xps-13> Message-ID: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Miquel Raynal writes: > Hi Aidan, > > aidanmacdonald.0x0@gmail.com wrote on Fri, 3 Jun 2022 14:51:49 +0100: > >> Add support for the ATO25D1GA SPI NAND flash. >>=20 >> Datasheet: >> - https://atta.szlcsc.com/upload/public/pdf/source/20191212/C469320_0459= 9D67B03B078044EB65FF5AEDDDE9.pdf >>=20 >> Signed-off-by: Aidan MacDonald >> --- >> drivers/mtd/nand/spi/Makefile | 2 +- >> drivers/mtd/nand/spi/ato.c | 86 +++++++++++++++++++++++++++++++++++ >> drivers/mtd/nand/spi/core.c | 1 + >> include/linux/mtd/spinand.h | 1 + >> 4 files changed, 89 insertions(+), 1 deletion(-) >> create mode 100644 drivers/mtd/nand/spi/ato.c >>=20 >> diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefi= le >> index 80dabe6ff0f3..ae17c13d1abe 100644 >> --- a/drivers/mtd/nand/spi/Makefile >> +++ b/drivers/mtd/nand/spi/Makefile >> @@ -1,3 +1,3 @@ >> # SPDX-License-Identifier: GPL-2.0 >> -spinand-objs :=3D core.o gigadevice.o macronix.o micron.o paragon.o tos= hiba.o winbond.o xtx.o >> +spinand-objs :=3D ato.o core.o gigadevice.o macronix.o micron.o paragon= .o toshiba.o winbond.o xtx.o > > I would keep core.o first in that list, even if it breaks alphabetical > ordering slightly :) > > Otherwise the patch looks good to me. > Okay, I'll send a v2 to fix that. >> obj-$(CONFIG_MTD_SPI_NAND) +=3D spinand.o >> diff --git a/drivers/mtd/nand/spi/ato.c b/drivers/mtd/nand/spi/ato.c >> new file mode 100644 >> index 000000000000..82b377c06812 >> --- /dev/null >> +++ b/drivers/mtd/nand/spi/ato.c >> @@ -0,0 +1,86 @@ >> +// SPDX-License-Identifier: GPL-2.0 >> +/* >> + * Copyright (C) 2022 Aidan MacDonald >> + * >> + * Author: Aidan MacDonald >> + */ >> + >> +#include >> +#include >> +#include >> + >> + >> +#define SPINAND_MFR_ATO 0x9b >> + >> + >> +static SPINAND_OP_VARIANTS(read_cache_variants, >> + SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), >> + SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), >> + SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); >> + >> +static SPINAND_OP_VARIANTS(write_cache_variants, >> + SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), >> + SPINAND_PROG_LOAD(true, 0, NULL, 0)); >> + >> +static SPINAND_OP_VARIANTS(update_cache_variants, >> + SPINAND_PROG_LOAD_X4(false, 0, NULL, 0), >> + SPINAND_PROG_LOAD(false, 0, NULL, 0)); >> + >> + >> +static int ato25d1ga_ooblayout_ecc(struct mtd_info *mtd, int section, >> + struct mtd_oob_region *region) >> +{ >> + if (section > 3) >> + return -ERANGE; >> + >> + region->offset =3D (16 * section) + 8; >> + region->length =3D 8; >> + return 0; >> +} >> + >> +static int ato25d1ga_ooblayout_free(struct mtd_info *mtd, int section, >> + struct mtd_oob_region *region) >> +{ >> + if (section > 3) >> + return -ERANGE; >> + >> + if (section) { >> + region->offset =3D (16 * section); >> + region->length =3D 8; >> + } else { >> + /* first byte of section 0 is reserved for the BBM */ >> + region->offset =3D 1; >> + region->length =3D 7; >> + } >> + >> + return 0; >> +} >> + >> +static const struct mtd_ooblayout_ops ato25d1ga_ooblayout =3D { >> + .ecc =3D ato25d1ga_ooblayout_ecc, >> + .free =3D ato25d1ga_ooblayout_free, >> +}; >> + >> + >> +static const struct spinand_info ato_spinand_table[] =3D { >> + SPINAND_INFO("ATO25D1GA", >> + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x12), >> + NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), >> + NAND_ECCREQ(1, 512), >> + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, >> + &write_cache_variants, >> + &update_cache_variants), >> + SPINAND_HAS_QE_BIT, >> + SPINAND_ECCINFO(&ato25d1ga_ooblayout, NULL)), >> +}; >> + >> +static const struct spinand_manufacturer_ops ato_spinand_manuf_ops =3D { >> +}; >> + >> +const struct spinand_manufacturer ato_spinand_manufacturer =3D { >> + .id =3D SPINAND_MFR_ATO, >> + .name =3D "ATO", >> + .chips =3D ato_spinand_table, >> + .nchips =3D ARRAY_SIZE(ato_spinand_table), >> + .ops =3D &ato_spinand_manuf_ops, >> +}; >> diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c >> index d5b685d1605e..9d73910a7ae8 100644 >> --- a/drivers/mtd/nand/spi/core.c >> +++ b/drivers/mtd/nand/spi/core.c >> @@ -927,6 +927,7 @@ static const struct nand_ops spinand_ops =3D { >> }; >>=20=20 >> static const struct spinand_manufacturer *spinand_manufacturers[] =3D { >> + &ato_spinand_manufacturer, >> &gigadevice_spinand_manufacturer, >> ¯onix_spinand_manufacturer, >> µn_spinand_manufacturer, >> diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h >> index 5584d3bb6556..6d3392a7edc6 100644 >> --- a/include/linux/mtd/spinand.h >> +++ b/include/linux/mtd/spinand.h >> @@ -260,6 +260,7 @@ struct spinand_manufacturer { >> }; >>=20=20 >> /* SPI NAND manufacturers */ >> +extern const struct spinand_manufacturer ato_spinand_manufacturer; >> extern const struct spinand_manufacturer gigadevice_spinand_manufacture= r; >> extern const struct spinand_manufacturer macronix_spinand_manufacturer; >> extern const struct spinand_manufacturer micron_spinand_manufacturer; > > > Thanks, > Miqu=C3=A8l Regards, Aidan