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Thu, 12 Oct 2023 12:50:24 +0000 Received: from MA0P287MB0332.INDP287.PROD.OUTLOOK.COM ([fe80::efe9:8d54:281b:23f7]) by MA0P287MB0332.INDP287.PROD.OUTLOOK.COM ([fe80::efe9:8d54:281b:23f7%3]) with mapi id 15.20.6863.043; Thu, 12 Oct 2023 12:50:24 +0000 Message-ID: Date: Thu, 12 Oct 2023 20:50:18 +0800 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 4/7] riscv: dts: sophgo: Separate common devices from cv1800b soc To: Inochi Amaoto , Chao Wei , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou Cc: Jisheng Zhang , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org References: <20231009112642.477337-1-inochiama@outlook.com> From: Chen Wang In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-TMN: [USmAh0k1e4tNgW/PzfNgykK3sYiyoR/C] X-ClientProxiedBy: SG2PR03CA0125.apcprd03.prod.outlook.com (2603:1096:4:91::29) To MA0P287MB0332.INDP287.PROD.OUTLOOK.COM (2603:1096:a01:ab::5) X-Microsoft-Original-Message-ID: <4430bb15-9856-4c1a-82bb-91e048771b5a@outlook.com> MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MA0P287MB0332:EE_|PN0P287MB0411:EE_ X-MS-Office365-Filtering-Correlation-Id: a7a10457-5c05-4a7d-f172-08dbcb21cca3 X-Microsoft-Antispam: BCL:0; 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> - #address-cells = <1>; > - #size-cells = <1>; > - > - cpus: cpus { > - #address-cells = <1>; > - #size-cells = <0>; > - timebase-frequency = <25000000>; > - > - cpu0: cpu@0 { > - compatible = "thead,c906", "riscv"; > - device_type = "cpu"; > - reg = <0>; > - d-cache-block-size = <64>; > - d-cache-sets = <512>; > - d-cache-size = <65536>; > - i-cache-block-size = <64>; > - i-cache-sets = <128>; > - i-cache-size = <32768>; > - mmu-type = "riscv,sv39"; > - riscv,isa = "rv64imafdc"; > - riscv,isa-base = "rv64i"; > - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", > - "zifencei", "zihpm"; > - > - cpu0_intc: interrupt-controller { > - compatible = "riscv,cpu-intc"; > - interrupt-controller; > - #address-cells = <0>; > - #interrupt-cells = <1>; > - }; > - }; > - }; > - > - osc: oscillator { > - compatible = "fixed-clock"; > - clock-output-names = "osc_25m"; > - #clock-cells = <0>; > - }; > > soc { > - compatible = "simple-bus"; > interrupt-parent = <&plic>; > - #address-cells = <1>; > - #size-cells = <1>; > - dma-noncoherent; > - ranges; > - > - uart0: serial@4140000 { > - compatible = "snps,dw-apb-uart"; > - reg = <0x04140000 0x100>; > - interrupts = <44 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&osc>; > - reg-shift = <2>; > - reg-io-width = <4>; > - status = "disabled"; > - }; > - > - uart1: serial@4150000 { > - compatible = "snps,dw-apb-uart"; > - reg = <0x04150000 0x100>; > - interrupts = <45 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&osc>; > - reg-shift = <2>; > - reg-io-width = <4>; > - status = "disabled"; > - }; > - > - uart2: serial@4160000 { > - compatible = "snps,dw-apb-uart"; > - reg = <0x04160000 0x100>; > - interrupts = <46 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&osc>; > - reg-shift = <2>; > - reg-io-width = <4>; > - status = "disabled"; > - }; > - > - uart3: serial@4170000 { > - compatible = "snps,dw-apb-uart"; > - reg = <0x04170000 0x100>; > - interrupts = <47 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&osc>; > - reg-shift = <2>; > - reg-io-width = <4>; > - status = "disabled"; > - }; > - > - uart4: serial@41c0000 { > - compatible = "snps,dw-apb-uart"; > - reg = <0x041c0000 0x100>; > - interrupts = <48 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&osc>; > - reg-shift = <2>; > - reg-io-width = <4>; > - status = "disabled"; > - }; > > plic: interrupt-controller@70000000 { > compatible = "sophgo,cv1800b-plic", "thead,c900-plic"; > diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv180x.dtsi > similarity index 80% > copy from arch/riscv/boot/dts/sophgo/cv1800b.dtsi > copy to arch/riscv/boot/dts/sophgo/cv180x.dtsi > index df40e87ee063..ffaf51724c98 100644 > --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > +++ b/arch/riscv/boot/dts/sophgo/cv180x.dtsi > @@ -1,12 +1,12 @@ > // SPDX-License-Identifier: (GPL-2.0 OR MIT) > /* > * Copyright (C) 2023 Jisheng Zhang > + * Copyright (C) 2023 Inochi Amaoto > */ > > #include > > / { > - compatible = "sophgo,cv1800b"; > #address-cells = <1>; > #size-cells = <1>; > > @@ -48,7 +48,6 @@ osc: oscillator { > > soc { > compatible = "simple-bus"; > - interrupt-parent = <&plic>; > #address-cells = <1>; > #size-cells = <1>; > dma-noncoherent; > @@ -103,21 +102,5 @@ uart4: serial@41c0000 { > reg-io-width = <4>; > status = "disabled"; > }; > - > - plic: interrupt-controller@70000000 { > - compatible = "sophgo,cv1800b-plic", "thead,c900-plic"; > - reg = <0x70000000 0x4000000>; > - interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>; > - interrupt-controller; > - #address-cells = <0>; > - #interrupt-cells = <2>; > - riscv,ndev = <101>; > - }; > - > - clint: timer@74000000 { > - compatible = "sophgo,cv1800b-clint", "thead,c900-clint"; > - reg = <0x74000000 0x10000>; > - interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>; > - }; > }; > }; > -- > 2.42.0 >