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Fri, 29 Nov 2024 12:17:25 +0000 From: Bhavin Sharma To: Krzysztof Kozlowski , "sre@kernel.org" , "krzk+dt@kernel.org" CC: Hardevsinh Palaniya , Rob Herring , Conor Dooley , "linux-pm@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH v5 1/2] dt-bindings: power: supply: Add STC3117 Fuel Gauge Thread-Topic: [PATCH v5 1/2] dt-bindings: power: supply: Add STC3117 Fuel Gauge Thread-Index: AQHbQlPYB+5g4qwzoUOYDL/HkY/HgbLOJJUAgAADVLI= Date: Fri, 29 Nov 2024 12:17:25 +0000 Message-ID: References: <20241129114200.13351-1-bhavin.sharma@siliconsignals.io> <20241129114200.13351-2-bhavin.sharma@siliconsignals.io> <4e8f9526-f7cf-46b1-bdb3-831dc04543f3@kernel.org> In-Reply-To: <4e8f9526-f7cf-46b1-bdb3-831dc04543f3@kernel.org> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: msip_labels: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=siliconsignals.io; x-ms-publictraffictype: Email x-ms-traffictypediagnostic: MA0P287MB1178:EE_|PN0P287MB0312:EE_ x-ms-office365-filtering-correlation-id: 6a9fadd2-3632-4f91-f3fb-08dd106fc90c x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0;ARA:13230040|366016|376014|1800799024|38070700018; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-OriginatorOrg: siliconsignals.io X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: MA0P287MB1178.INDP287.PROD.OUTLOOK.COM X-MS-Exchange-CrossTenant-Network-Message-Id: 6a9fadd2-3632-4f91-f3fb-08dd106fc90c X-MS-Exchange-CrossTenant-originalarrivaltime: 29 Nov 2024 12:17:25.6903 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 7ec5089e-a433-4bd1-a638-82ee62e21d37 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: JofuS/05ltRNdRSX8xkMC9xe08xg//5JLnqEwSjYnEQhON4AUP5dXku+d3P2Z07/QzT4kytIA4VYZYMjoUKdpohItg9+G2mGDgbK1IsqzGc= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PN0P287MB0312 Hi=A0Krzysztof,=0A= =0A= Thanks for the review=0A= =0A= > > Signed-off-by: Hardevsinh Palaniya =0A= > > Signed-off-by: Bhavin Sharma =0A= >=0A= > Your SoBs are odd... second patch has totally reversed path comparing to= =0A= > this one. What do you want to express here?=0A= =0A= i will correct the order=0A= =0A= > > +=A0 sense-resistor:=0A= > > +=A0=A0=A0 $ref: /schemas/types.yaml#/definitions/phandle=0A= > > +=A0=A0=A0 description: Current sense resistor in milliohms=0A= >=0A= > phandle cannot be in milliohms... Anyway, use existing widely used=0A= > property: shunt-resistor-micro-ohms=0A= =0A= okay=0A= =0A= > > +=A0=A0=A0=A0=A0 bat: battery {=0A= > > +=A0=A0=A0=A0=A0=A0=A0 compatible =3D "simple-battery";=0A= > > +=A0=A0=A0=A0=A0=A0=A0 charge-full-design-microamp-hours =3D <2600000>;= =0A= > > +=A0=A0=A0=A0=A0=A0=A0 voltage-min-design-microvolt =3D <3300000>;=0A= > > +=A0=A0=A0=A0=A0=A0=A0 voltage-max-design-microvolt =3D <4250000>;=0A= > > +=A0=A0=A0=A0=A0 };=0A= >=0A= > Drop battery node, not needed for example.=0A= =0A= okay =0A= =0A= > > +=A0=A0=A0=A0=A0 battery@70 {=0A= > > +=A0=A0=A0=A0=A0=A0=A0 compatible =3D "st,stc3117";=0A= > > +=A0=A0=A0=A0=A0=A0=A0 reg =3D <0x70>;=0A= > > +=A0=A0=A0=A0=A0=A0=A0 interrupt-parent =3D <&gpio0>;=0A= > > +=A0=A0=A0=A0=A0=A0=A0 interrupts =3D <31 IRQ_TYPE_LEVEL_LOW>;=0A= > =0A= > It does not look like you tested the bindings, at least after quick=0A= > look. Please run `make dt_binding_check` (see=0A= > Documentation/devicetree/bindings/writing-schema.rst for instructions).= =0A= > Maybe you need to update your dtschema and yamllint.=0A= =0A= ohh yes , need to add bindings for interrupt =0A= =0A= Best Regards,=0A= Bhavin=