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Tue, 19 Mar 2024 07:40:51 +0000 Received: from MA0P287MB2822.INDP287.PROD.OUTLOOK.COM ([fe80::1bd4:64d4:daf5:ae42]) by MA0P287MB2822.INDP287.PROD.OUTLOOK.COM ([fe80::1bd4:64d4:daf5:ae42%3]) with mapi id 15.20.7386.023; Tue, 19 Mar 2024 07:40:51 +0000 Message-ID: Date: Tue, 19 Mar 2024 15:40:46 +0800 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v11 4/5] clk: sophgo: Add SG2042 clock driver To: Stephen Boyd , Chen Wang , aou@eecs.berkeley.edu, chao.wei@sophgo.com, conor@kernel.org, devicetree@vger.kernel.org, guoren@kernel.org, haijiao.liu@sophgo.com, inochiama@outlook.com, jszhang@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, mturquette@baylibre.com, palmer@dabbelt.com, paul.walmsley@sifive.com, richardcochran@gmail.com, robh+dt@kernel.org, samuel.holland@sifive.com, xiaoguang.xing@sophgo.com References: <47a83f766c85481b73c6e6dd3759d4d9.sboyd@kernel.org> From: Chen Wang In-Reply-To: <47a83f766c85481b73c6e6dd3759d4d9.sboyd@kernel.org> Content-Type: text/plain; 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I have some additional explanations for two of these points. On 2024/3/9 10:11, Stephen Boyd wrote: [......] >> + >> +/* >> + * Below array is the total combination lists of POSTDIV1 and POSTDIV2 >> + * for example: >> + * postdiv1_2[0] = {2, 4, 8} >> + * ==> div1 = 2, div2 = 4 , div1 * div2 = 8 >> + * And POSTDIV_RESULT_INDEX point to 3rd element in the array >> + */ >> +#define POSTDIV_RESULT_INDEX 2 >> +static int postdiv1_2[][3] = { > const? And move it to the function scope. > >> + {2, 4, 8}, {3, 3, 9}, {2, 5, 10}, {2, 6, 12}, >> + {2, 7, 14}, {3, 5, 15}, {4, 4, 16}, {3, 6, 18}, >> + {4, 5, 20}, {3, 7, 21}, {4, 6, 24}, {5, 5, 25}, >> + {4, 7, 28}, {5, 6, 30}, {5, 7, 35}, {6, 6, 36}, >> + {6, 7, 42}, {7, 7, 49} > It may be better to make it a struct with named members because I have > no idea what each element means. I plan to add some comments to explain the meaning of this array member. This array is only used in this function, and I think it is somewhat unnecessary to define a structure specifically for it. Adding some comments will help everyone understand better. [......] >> + >> +/* >> + * Common data of clock-controller >> + * Note: this structure will be used both by clkgen & sysclk. >> + * @iobase: base address of clock-controller >> + * @regmap: base address of clock-controller for pll, just due to PLL uses >> + * regmap while others use iomem. >> + * @lock: clock register access lock >> + * @onecell_data: used for adding providers. >> + */ >> +struct sg2042_clk_data { >> + void __iomem *iobase; > Why not use a regmap for the iobase as well? I plan to unify it as iomem. Anyway, just use one method should be fine. [......]