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Wed, 31 Jan 2024 03:44:44 +0000 Received: from MA0P287MB2822.INDP287.PROD.OUTLOOK.COM ([fe80::a2d5:82f2:b6d4:f2cd]) by MA0P287MB2822.INDP287.PROD.OUTLOOK.COM ([fe80::a2d5:82f2:b6d4:f2cd%2]) with mapi id 15.20.7249.023; Wed, 31 Jan 2024 03:44:44 +0000 Message-ID: Date: Wed, 31 Jan 2024 11:44:37 +0800 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 3/4] riscv: dts: sophgo: add clock generator for Sophgo CV1800 series SoC To: Inochi Amaoto , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chao Wei , Paul Walmsley , Palmer Dabbelt , Albert Ou Cc: Jisheng Zhang , Liu Gui , Jingbao Qiu , dlan@gentoo.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org References: From: Chen Wang In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-TMN: [Lbc5l0YOv8f9WQOsk79/CalNQO0ovj53] X-ClientProxiedBy: SG2PR02CA0043.apcprd02.prod.outlook.com (2603:1096:3:18::31) To MA0P287MB2822.INDP287.PROD.OUTLOOK.COM (2603:1096:a01:138::5) X-Microsoft-Original-Message-ID: <2adeb19a-f86c-4244-ae7f-9e16b8dd6d2d@outlook.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MA0P287MB2822:EE_|PN0P287MB0875:EE_ X-MS-Office365-Filtering-Correlation-Id: 0cad8fda-3ecb-4e42-0b39-08dc220ef54c X-Microsoft-Antispam: BCL:0; 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This may > change in the future. See the last link for the discussion on > maintaining DT of CV1800 series. > > Signed-off-by: Inochi Amaoto > Link: https://github.com/milkv-duo/duo-files/blob/6f4e9b8ecb459e017cca1a8df248a19ca70837a3/duo/datasheet/CV1800B-CV1801B-Preliminary-Datasheet-full-en.pdf > Link: https://lore.kernel.org/all/IA1PR20MB495373158F3B690EF3BF2901BB8BA@IA1PR20MB4953.namprd20.prod.outlook.com/ Reviewed-by: Chen Wang > --- > arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 4 ++++ > arch/riscv/boot/dts/sophgo/cv1812h.dtsi | 4 ++++ > arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 6 ++++++ > 3 files changed, 14 insertions(+) > > diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > index 165e9e320a8c..baf641829e72 100644 > --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > @@ -16,3 +16,7 @@ &plic { > &clint { > compatible = "sophgo,cv1800b-clint", "thead,c900-clint"; > }; > + > +&clk { > + compatible = "sophgo,cv1800-clk"; > +}; > diff --git a/arch/riscv/boot/dts/sophgo/cv1812h.dtsi b/arch/riscv/boot/dts/sophgo/cv1812h.dtsi > index 3e7a942f5c1a..7fa4c1e2d1da 100644 > --- a/arch/riscv/boot/dts/sophgo/cv1812h.dtsi > +++ b/arch/riscv/boot/dts/sophgo/cv1812h.dtsi > @@ -22,3 +22,7 @@ &plic { > &clint { > compatible = "sophgo,cv1812h-clint", "thead,c900-clint"; > }; > + > +&clk { > + compatible = "sophgo,cv1810-clk"; > +}; > diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi > index 2d6f4a4b1e58..6ea1b2784db9 100644 > --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi > +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi > @@ -53,6 +53,12 @@ soc { > dma-noncoherent; > ranges; > > + clk: clock-controller@3002000 { > + reg = <0x03002000 0x1000>; > + clocks = <&osc>; > + #clock-cells = <1>; > + }; > + > gpio0: gpio@3020000 { > compatible = "snps,dw-apb-gpio"; > reg = <0x3020000 0x1000>; > -- > 2.43.0 >