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Sophgo SG2042 support To: Krzysztof Kozlowski References: <6e5ad808-f4ee-45c3-a1cc-009f2f1010b9@linaro.org> From: Chen Wang Cc: Chen Wang , adrian.hunter@intel.com, aou@eecs.berkeley.edu, conor+dt@kernel.org, guoren@kernel.org, inochiama@outlook.com, jszhang@kernel.org, krzysztof.kozlowski+dt@linaro.org, palmer@dabbelt.com, paul.walmsley@sifive.com, robh@kernel.org, ulf.hansson@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org, linux-riscv@lists.infradead.org, chao.wei@sophgo.com, haijiao.liu@sophgo.com, xiaoguang.xing@sophgo.com, tingzhu.wang@sophgo.com In-Reply-To: <6e5ad808-f4ee-45c3-a1cc-009f2f1010b9@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-TMN: [nqNLfbJsekHi2+9ZrmilL7fL0dHLrvd4] X-ClientProxiedBy: SG2PR01CA0166.apcprd01.prod.exchangelabs.com (2603:1096:4:28::22) To MA0P287MB2822.INDP287.PROD.OUTLOOK.COM (2603:1096:a01:138::5) X-Microsoft-Original-Message-ID: Precedence: bulk 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=?utf-8?B?b0hxb1VPR0NBbWg3VW9WcGk1eTNDMFVsemJ2NEl4WXFZeWVuczFDMzNsbVNz?= =?utf-8?Q?mxEAuiam4gW/nr7O9Oof?= X-OriginatorOrg: outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: f72fe459-1193-460a-4231-08dca636ab8e X-MS-Exchange-CrossTenant-AuthSource: MA0P287MB2822.INDP287.PROD.OUTLOOK.COM X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Jul 2024 08:01:31.8478 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 84df9e7f-e9f6-40af-b435-aaaaaaaaaaaa X-MS-Exchange-CrossTenant-RMS-PersistedConsumerOrg: 00000000-0000-0000-0000-000000000000 X-MS-Exchange-Transport-CrossTenantHeadersStamped: PN0P287MB0591 On 2024/6/18 17:39, Krzysztof Kozlowski wrote: > On 18/06/2024 10:38, Chen Wang wrote: >> From: Chen Wang >> >> SG2042 use Synopsys dwcnshc IP for SD/eMMC controllers. >> >> SG2042 defines 3 clocks for SD/eMMC controllers. >> - AXI_EMMC/AXI_SD for aclk/hclk(Bus interface clocks in DWC_mshc) >> and blck(Core Base Clock in DWC_mshc), these 3 clocks share one >> source, so reuse existing "core". >> - 100K_EMMC/100K_SD for cqetmclk(Timer clocks in DWC_mshc), so reuse >> existing "timer" which was added for rockchip specified. >> - EMMC_100M/SD_100M for cclk(Card clocks in DWC_mshc), add new "card". >> >> Adding example for sg2042. >> >> Signed-off-by: Chen Wang >> --- >> .../bindings/mmc/snps,dwcmshc-sdhci.yaml | 69 +++++++++++++------ >> 1 file changed, 49 insertions(+), 20 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml >> index 4d3031d9965f..b53f20733f79 100644 >> --- a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml >> +++ b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml >> @@ -21,6 +21,7 @@ properties: >> - snps,dwcmshc-sdhci >> - sophgo,cv1800b-dwcmshc >> - sophgo,sg2002-dwcmshc >> + - sophgo,sg2042-dwcmshc >> - thead,th1520-dwcmshc >> >> reg: >> @@ -29,25 +30,6 @@ properties: >> interrupts: >> maxItems: 1 >> >> - clocks: > Widest constraints stay here. > >> - minItems: 1 >> - items: >> - - description: core clock >> - - description: bus clock for optional >> - - description: axi clock for rockchip specified >> - - description: block clock for rockchip specified >> - - description: timer clock for rockchip specified >> - >> - >> - clock-names: >> - minItems: 1 > Widest constraints stay here. hi, Krzysztof, Please ask you a question about this widest constraints, I write bindings as below: ```yaml properties: ......   clocks:     minItems: 1   clock-names:     minItems: 1 ...... allOf:   - $ref: mmc-controller.yaml#   - if:       properties:         compatible:           contains:             const: sophgo,sg2042-dwcmshc     then:       properties:         clocks:           minItems: 1           items:             - description: core clock             - description: bus clock             - description: timer         clock-names:           minItems: 1           items:             - const: core             - const: bus             - const: timer     else:       properties:         clocks:           minItems: 1           items:             - description: core clock             - description: bus clock for optional             - description: axi clock for rockchip specified             - description: block clock for rockchip specified             - description: timer clock for rockchip specified         clock-names:           minItems: 1           items:             - const: core             - const: bus             - const: axi             - const: block             - const: timer ``` and with DTS as below: ```dts sd: mmc@704002b000 {             compatible = "sophgo,sg2042-dwcmshc";             reg = <0x70 0x4002b000 0x0 0x1000>;             interrupt-parent = <&intc>;             interrupts = <136 IRQ_TYPE_LEVEL_HIGH>;             clocks = <&clkgen GATE_CLK_SD_100M>,                  <&clkgen GATE_CLK_AXI_SD>,                  <&clkgen GATE_CLK_100K_SD>;             clock-names = "core",                       "bus",                       "timer";             status = "disabled";         }; ``` dtb check will report error: ``` .../arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dtb: mmc@704002b000: clocks: [[84, 38], [84, 64], [84, 76]] is too long     from schema $id: http://devicetree.org/schemas/mmc/snps,dwcmshc-sdhci.yaml# .../arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dtb: mmc@704002b000: clock-names: ['core', 'bus', 'timer'] is too long     from schema $id: http://devicetree.org/schemas/mmc/snps,dwcmshc-sdhci.yaml# ``` After I removed the widest constraints from the binding file, dtb check passes. Not sure if my understanding is wrong. Do you know what's the problem here? Seems the widest constraints is not needed, Thanks, Chen [......]