Re: [PATCH RFC] dt-bindings: rtc: sophgo: add RTC support for Sophgo CV1800 series SoC

[Chen Wang <unicorn_wang@outlook.com>]

On 2025/2/17 2:09, Alexander Sverdlin wrote:
> Add RTCSYS devicetree binding for Sophgo CV1800 SoC.
>
> The RTC (Real Time Clock) is an independently powered module in the chip.
> It contains a 32KHz oscillator and a Power-On-Reset (POR) sub-module, which
> can be used for time display and scheduled alarm produce. In addition, the
> hardware state machine provides triggering and timing control for chip
> power-on, power-off and reset.
>
> Furthermore, the 8051 subsystem is located within RTCSYS and is
> independently powered. System software can use the 8051 to manage wake
> conditions and wake the system while the system is asleep, and communicate
> with external devices through peripheral controllers.
>
> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
> ---
> QUESTION:
>
> I'm unsure about reg properties in the subnodes (child devices) of
> RTCSYS:
> - they will not be used anyway by the drivers because they genuinely
> overlap (the whole point of going MFD) -- therefore the drivers will do
> syscon_node_to_regmap(pdev->dev.parent->of_node)
> - as I understood from the history of MFD dt bindings' submissions, regs
> are encouraged, if can be specified
> - overlapping regs cause dt_binding_check warnings:
> Documentation/devicetree/bindings/mfd/sophgo,cv1800b-rtcsys.example.dts:34.19-39.15: Warning (unique_unit_address_if_enabled): /example-0/rtcsys@5025000/mcu@0: duplicate unit-address (also used in node /example-0/rtcsys@5025000/pmu@0)
> Documentation/devicetree/bindings/mfd/sophgo,cv1800b-rtcsys.example.dts:34.19-39.15: Warning (unique_unit_address_if_enabled): /example-0/rtcsys@5025000/mcu@0: duplicate unit-address (also used in node /example-0/rtcsys@5025000/rtc@0)
>
> Shall I remove the MMIO resources from the actual devices or rather ignore the warnings?
>
>   .../bindings/mfd/sophgo,cv1800b-rtcsys.yaml   | 222 ++++++++++++++++++
>   1 file changed, 222 insertions(+)
>   create mode 100644 Documentation/devicetree/bindings/mfd/sophgo,cv1800b-rtcsys.yaml
>
> diff --git a/Documentation/devicetree/bindings/mfd/sophgo,cv1800b-rtcsys.yaml b/Documentation/devicetree/bindings/mfd/sophgo,cv1800b-rtcsys.yaml
> new file mode 100644
> index 000000000000..2dc7c2df15c1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mfd/sophgo,cv1800b-rtcsys.yaml
> @@ -0,0 +1,222 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mfd/sophgo,cv1800b-rtcsys.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Cvitek CV18xx/Sophgo SG200x Real Time Clock module
> +
> +maintainers:
> +  - Alexander Sverdlin <alexander.sverdlin@gmail.com>
> +  - sophgo@lists.linux.dev
> +
> +description:
> +  The RTC (Real Time Clock) is an independently powered module in the chip. It
> +  contains a 32KHz oscillator and a Power-On-Reset (POR) sub-module, which can
> +  be used for time display and scheduled alarm produce. In addition, the
> +  hardware state machine provides triggering and timing control for chip
> +  power-on, power-off and reset.
> +
> +  Furthermore, the 8051 subsystem is located within RTCSYS and is independently
> +  powered. System software can use the 8051 to manage wake conditions and wake
> +  the system while the system is asleep, and communicate with external devices
> +  through peripheral controllers.
> +
> +  Technical Reference Manual available at
> +    https://github.com/sophgo/sophgo-doc/releases/download/sg2000-trm-v1.01/sg2000_trm_en.pdf
https://github.com/sophgo/sophgo-doc/tree/main/SG200X/TRM would be better.
> +
> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +          - sophgo,cv1800b-rtcsys
> +      - const: simple-mfd
> +      - const: syscon
> +
> +  reg:
> +    maxItems: 1
> +
> +  "#address-cells":
> +    const: 1
> +
> +  "#size-cells":
> +    const: 1
> +
> +  ranges: true
> +
> +patternProperties:
> +  "^mcu@[0-9a-f]+$":
> +    type: object
> +    additionalProperties: false
> +
> +    description:
> +      The 8051 subsystem is located within RTCSYS and is independently powered.
> +      System software can use the 8051 to manage wake conditions and wake the
> +      system while the system is asleep, and communicate with external devices
> +      through peripheral controllers.
> +
> +    properties:
> +      compatible:
> +        items:
> +          - enum:
> +              - sophgo,cv1800b-rtc-dw8051
> +
> +      reg:
> +        maxItems: 1
> +
> +      clocks:
> +        maxItems: 1
> +
> +      resets:
> +        maxItems: 1
> +
> +      sram:
> +        $ref: /schemas/types.yaml#/definitions/phandle
> +        maxItems: 1
> +        description: The SRAM controller to host the code/data
> +
> +    required:
> +      - compatible
> +      - clocks
> +
> +  "^pmu@[0-9a-f]+$":
> +    type: object
> +    additionalProperties: false
> +
> +    description:
> +      Power-On-Reset (POR) sub-module, hardware state machine providing
> +      triggering and timing control for chip power-on, power-off and reset.
> +      Supports battery low voltage detection and interrupt generation, as
> +      well as button-triggered wake up from sleep.
> +
> +    properties:
> +      compatible:
> +        items:
> +          - enum:
> +              - sophgo,cv1800b-rtc-pmu
> +
> +      reg:
> +        maxItems: 1
> +
> +      clocks:
> +        maxItems: 1
> +
> +      interrupts:
> +        items:
> +          - description: long button press interrupt
> +          - description: vbat detection interrupt
> +
> +      interrupt-names:
> +        items:
> +          - const: longpress
> +          - const: vbat
> +
> +    required:
> +      - compatible
> +
> +  "^rtc@[0-9a-f]+$":
> +    type: object
> +    additionalProperties: false
> +
> +    description:
> +      The RTC (Real Time Clock) is an independently powered module in the chip.
> +      Its calibration module uses a 25MHz crystal oscillator clock to calibrate
> +      32KHz oscillator.
> +
> +    properties:
> +      compatible:
> +        items:
> +          - enum:
> +              - sophgo,cv1800b-rtc
> +
> +      reg:
> +        maxItems: 1
> +
> +      clocks:
> +        maxItems: 1
> +
> +      interrupts:
> +        items:
> +          - description: alarm interrupt
> +
> +      interrupt-names:
> +        items:
> +          - const: alarm
> +
> +    required:
> +      - compatible
> +      - clocks
> +      - interrupts
> +
> +  "^sram@[0-9a-f]+$":
> +    type: object
> +    additionalProperties: false
> +
> +    description:
> +      Provide 2KB of SRAM, which can host software code or temporary data.
> +
> +    properties:
> +      compatible:
> +        items:
> +          - enum:
> +              - sophgo,cv1800b-rtc-sram
> +
> +      reg:
> +        maxItems: 1
> +
> +      clocks:
> +        maxItems: 1
> +
> +    required:
> +      - compatible
> +
> +required:
> +  - compatible
> +  - reg
> +  - "#address-cells"
> +  - "#size-cells"
> +  - ranges
> +
> +additionalProperties:
> +  type: object
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/sophgo,cv1800.h>
> +    #include <dt-bindings/interrupt-controller/irq.h>
> +
> +    rtcsys@5025000 {
> +        compatible = "sophgo,cv1800b-rtcsys", "simple-mfd", "syscon";
> +        reg = <0x5025000 0x2000>;
> +        #address-cells = <1>;
> +        #size-cells = <1>;
> +        ranges = <0 0x5025000 0x2000>;
> +
> +        mcu@0 {
> +            compatible = "sophgo,cv1800b-rtc-dw8051";
> +            reg = <0x0 0x1000>;
> +            clocks = <&clk CLK_SRC_RTC_SYS_0>;
> +            sram = <&rtc_sram>;
> +        };
> +
> +        pmu@0 {
> +            compatible = "sophgo,cv1800b-rtc-pmu";
> +            reg = <0x0 0x2000>;
> +            interrupts = <18 IRQ_TYPE_LEVEL_HIGH>,
> +                         <19 IRQ_TYPE_LEVEL_HIGH>;
> +            interrupt-names = "longpress", "vbat";
> +        };
> +
> +        rtc@0 {
> +            compatible = "sophgo,cv1800b-rtc";
> +            reg = <0 0x2000>;
> +            interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
> +            interrupt-names = "alarm";
> +            clocks = <&clk CLK_RTC_25M>;
> +        };
> +
> +        rtc_sram: sram@0 {
> +            compatible = "sophgo,cv1800b-rtc-sram";
> +            reg = <0x0 0x1000>;
> +        };
> +    };