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From: Chen Wang <unicorn_wang@outlook.com>
To: Mingcong Bai <jeffbai@aosc.io>, Chen Wang <unicornxw@gmail.com>,
	kwilczynski@kernel.org, u.kleine-koenig@baylibre.com,
	aou@eecs.berkeley.edu, alex@ghiti.fr, arnd@arndb.de,
	bwawrzyn@cisco.com, bhelgaas@google.com, conor+dt@kernel.org,
	18255117159@163.com, inochiama@gmail.com, kishon@kernel.org,
	krzk+dt@kernel.org, lpieralisi@kernel.org, mani@kernel.org,
	palmer@dabbelt.com, paul.walmsley@sifive.com, robh@kernel.org,
	s-vadapalli@ti.com, tglx@linutronix.de,
	thomas.richard@bootlin.com, sycamoremoon376@gmail.com,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-pci@vger.kernel.org, linux-riscv@lists.infradead.org,
	sophgo@lists.linux.dev, rabenda.cn@gmail.com,
	chao.wei@sophgo.com, xiaoguang.xing@sophgo.com,
	fengchun.li@sophgo.com
Subject: Re: [PATCH v2 3/7] PCI: sg2042: Add Sophgo SG2042 PCIe driver
Date: Fri, 12 Sep 2025 08:52:30 +0800	[thread overview]
Message-ID: <MAUPR01MB1107222DD9BBA9349C3907E21FE08A@MAUPR01MB11072.INDPRD01.PROD.OUTLOOK.COM> (raw)
In-Reply-To: <35447ba0-21c2-4a12-9d27-033a7be0af3e@aosc.io>


On 9/12/2025 12:17 AM, Mingcong Bai wrote:
> Hi Chen,
>
> 在 2025/9/10 10:08, Chen Wang 写道:
>> +config PCIE_SG2042_HOST
>> +    tristate "Sophgo SG2042 PCIe controller (host mode)"
>> +    depends on OF && (ARCH_SOPHGO || COMPILE_TEST)
>> +    select PCIE_CADENCE_HOST
>> +    help
>> +      Say Y here if you want to support the Sophgo SG2042 PCIe platform
>> +      controller in host mode. Sophgo SG2042 PCIe controller uses 
>> Cadence
>> +      PCIe core.
>> +
>
> While build testing this patch against v6.16.6, PCIE_SG2042_HOST is 
> set to "M", the kernel would fail to build during MODPOST:
>
> ERROR: modpost: "cdns_pcie_pm_ops" 
> [drivers/pci/controller/cadence/pcie-sg2042.ko] undefined!
> make[2]: *** [scripts/Makefile.modpost:147: Module.symvers] Error 1
> make[1]: *** [[...]/linux-6.16.6/Makefile:1953: modpost] Error 2
> make: *** [Makefile:248: __sub-make] Error 2
>
My fault, seems there were some problems when I submitted the driver 
code. I will correct them immediately and submit a new version.

Thanks,

Chen


> Best Regards,
> Mingcong Bai

  reply	other threads:[~2025-09-12  0:52 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-10  2:07 [PATCH v2 0/7] Add PCIe support to Sophgo SG2042 SoC Chen Wang
2025-09-10  2:07 ` [PATCH v2 1/7] dt-bindings: pci: Add Sophgo SG2042 PCIe host Chen Wang
2025-09-10  2:08 ` [PATCH v2 2/7] PCI: cadence: Check pcie-ops before using it Chen Wang
2025-09-10 14:23   ` Bjorn Helgaas
2025-09-10  2:08 ` [PATCH v2 3/7] PCI: sg2042: Add Sophgo SG2042 PCIe driver Chen Wang
2025-09-10  2:56   ` Inochi Amaoto
2025-09-10  3:20     ` Chen Wang
2025-09-11 17:03     ` Manivannan Sadhasivam
2025-09-12  2:47       ` Inochi Amaoto
2025-09-10 14:34   ` Bjorn Helgaas
2025-09-11  0:09     ` Chen Wang
2025-09-11 16:17   ` Mingcong Bai
2025-09-12  0:52     ` Chen Wang [this message]
2025-09-10  2:09 ` [PATCH v2 4/7] riscv: sophgo: dts: add PCIe controllers for SG2042 Chen Wang
2025-09-10  2:09 ` [PATCH v2 5/7] riscv: sophgo: dts: enable PCIe for PioneerBox Chen Wang
2025-09-10  2:10 ` [PATCH v2 6/7] riscv: sophgo: dts: enable PCIe for SG2042_EVB_V1.X Chen Wang
2025-09-10  2:10 ` [PATCH v2 7/7] riscv: sophgo: dts: enable PCIe for SG2042_EVB_V2.0 Chen Wang

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