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from round_rate() to determine_rate() To: Brian Masney , Michael Turquette , Stephen Boyd , Vladimir Zapolskiy , Piotr Wojtaszczyk , Inochi Amaoto , Michal Simek , Bjorn Andersson , Heiko Stuebner , Andrea della Porta , Maxime Ripard Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, sophgo@lists.linux.dev, linux-arm-msm@vger.kernel.org, linux-rockchip@lists.infradead.org References: <20250828-clk-round-rate-v2-v1-0-b97ec8ba6cc4@redhat.com> <20250828-clk-round-rate-v2-v1-5-b97ec8ba6cc4@redhat.com> From: Chen Wang In-Reply-To: <20250828-clk-round-rate-v2-v1-5-b97ec8ba6cc4@redhat.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: TYCP286CA0020.JPNP286.PROD.OUTLOOK.COM (2603:1096:400:263::12) To MAUPR01MB11072.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a01:16f::16) X-Microsoft-Original-Message-ID: <10de9834-4584-49df-8d51-1bee1c821e62@outlook.com> Precedence: bulk X-Mailing-List: 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X-MS-Exchange-Transport-CrossTenantHeadersStamped: PN0PR01MB9365 On 8/29/2025 8:38 AM, Brian Masney wrote: > The round_rate() clk ops is deprecated, so migrate this driver from > round_rate() to determine_rate() using the Coccinelle semantic patch > on the cover letter of this series. > > Reviewed-by: Chen Wang > Signed-off-by: Brian Masney Tested-by: Chen Wang # Pioneerbox Thanks, Chen > --- > drivers/clk/sophgo/clk-sg2042-clkgen.c | 17 +++++++++-------- > 1 file changed, 9 insertions(+), 8 deletions(-) > > diff --git a/drivers/clk/sophgo/clk-sg2042-clkgen.c b/drivers/clk/sophgo/clk-sg2042-clkgen.c > index 9e61288d34f3757315702c355f2669577b29676f..683661b71787c9e5428b168502f6fbb30ea9f7da 100644 > --- a/drivers/clk/sophgo/clk-sg2042-clkgen.c > +++ b/drivers/clk/sophgo/clk-sg2042-clkgen.c > @@ -176,9 +176,8 @@ static unsigned long sg2042_clk_divider_recalc_rate(struct clk_hw *hw, > return ret_rate; > } > > -static long sg2042_clk_divider_round_rate(struct clk_hw *hw, > - unsigned long rate, > - unsigned long *prate) > +static int sg2042_clk_divider_determine_rate(struct clk_hw *hw, > + struct clk_rate_request *req) > { > struct sg2042_divider_clock *divider = to_sg2042_clk_divider(hw); > unsigned long ret_rate; > @@ -192,15 +191,17 @@ static long sg2042_clk_divider_round_rate(struct clk_hw *hw, > bestdiv = readl(divider->reg) >> divider->shift; > bestdiv &= clk_div_mask(divider->width); > } > - ret_rate = DIV_ROUND_UP_ULL((u64)*prate, bestdiv); > + ret_rate = DIV_ROUND_UP_ULL((u64)req->best_parent_rate, bestdiv); > } else { > - ret_rate = divider_round_rate(hw, rate, prate, NULL, > + ret_rate = divider_round_rate(hw, req->rate, &req->best_parent_rate, NULL, > divider->width, divider->div_flags); > } > > pr_debug("--> %s: divider_round_rate: val = %ld\n", > clk_hw_get_name(hw), ret_rate); > - return ret_rate; > + req->rate = ret_rate; > + > + return 0; > } > > static int sg2042_clk_divider_set_rate(struct clk_hw *hw, > @@ -258,13 +259,13 @@ static int sg2042_clk_divider_set_rate(struct clk_hw *hw, > > static const struct clk_ops sg2042_clk_divider_ops = { > .recalc_rate = sg2042_clk_divider_recalc_rate, > - .round_rate = sg2042_clk_divider_round_rate, > + .determine_rate = sg2042_clk_divider_determine_rate, > .set_rate = sg2042_clk_divider_set_rate, > }; > > static const struct clk_ops sg2042_clk_divider_ro_ops = { > .recalc_rate = sg2042_clk_divider_recalc_rate, > - .round_rate = sg2042_clk_divider_round_rate, > + .determine_rate = sg2042_clk_divider_determine_rate, > }; > > /* >