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Wed, 11 Nov 2026 18:00:59 +0000 Received: from MN2PR02MB6863.namprd02.prod.outlook.com ([fe80::da67:fd0f:d96d:ac53]) by MN2PR02MB6863.namprd02.prod.outlook.com ([fe80::da67:fd0f:d96d:ac53%4]) with mapi id 15.21.0615.007; Wed, 11 Nov 2026 18:00:59 +0000 From: Michael Kelley To: Kameron Carr , "decui@microsoft.com" , "haiyangz@microsoft.com" , "wei.liu@kernel.org" CC: "arnd@arndb.de" , "catalin.marinas@arm.com" , "linux-arch@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-hyperv@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "lpieralisi@kernel.org" , "mark.rutland@arm.com" , "sudeep.holla@kernel.org" , "thuth@redhat.com" , "will@kernel.org" Subject: RE: [PATCH v6 3/6] arm64: hyperv: Add per-CPU RSI host call infrastructure for CCA Realms Thread-Topic: [PATCH v6 3/6] arm64: hyperv: Add per-CPU RSI host call infrastructure for CCA Realms Thread-Index: AQHdaMzTk5/lTQAdtkW0DiK1+GVhibcpO5kQ Date: Wed, 11 Nov 2026 18:00:58 +0000 Message-ID: References: <20261031001412.4150488-1-kameroncarr@linux.microsoft.com> <20261031001412.4150488-4-kameroncarr@linux.microsoft.com> In-Reply-To: <20261031001412.4150488-4-kameroncarr@linux.microsoft.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-publictraffictype: Email x-ms-traffictypediagnostic: MN2PR02MB6863:EE_|CH3PR02MB9714:EE_ x-ms-office365-filtering-correlation-id: 9597c95f-c796-4c21-dcd8-08df401dbdaa x-microsoft-antispam: BCL:0;ARA:14566002|13091999003|24021099003|31061999003|25010399006|55001999006|41001999006|19110799012|8060799015|12121999013|8062599012|37011999003|51005399006|15080799012|12091999003|40105399003|102099032|440099028|3412199025; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 X-OriginatorOrg: outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: MN2PR02MB6863.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-RMS-PersistedConsumerOrg: 00000000-0000-0000-0000-000000000000 X-MS-Exchange-CrossTenant-Network-Message-Id: 9597c95f-c796-4c21-dcd8-08df401dbdaa X-MS-Exchange-CrossTenant-originalarrivaltime: 11 Nov 2026 18:00:58.8919 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 84df9e7f-e9f6-40af-b435-aaaaaaaaaaaa X-MS-Exchange-CrossTenant-rms-persistedconsumerorg: 00000000-0000-0000-0000-000000000000 X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR02MB9714 From: Kameron Carr Sent: Friday, October = 30, 2026 5:14 PM >=20 > Arm CCA Realms cannot issue Hyper-V hypercalls via HVC; the guest must > route them through the RSI_HOST_CALL interface, which takes the IPA of a > per-CPU rsi_host_call structure as its argument. >=20 > Add hv_hostcall_array as a per-CPU struct array and allocate it during > hyperv_init(). A quibble: This statement is a bit misleading. I think you mean it is a global array with an entry for each CPU. The term "per-CPU" typically means something allocated out of the per-CPU area. Michael =20 > The allocation is gated on is_realm_world() so non-Realm > arm64 Hyper-V guests pay no memory cost. >=20 > Reviewed-by: Michael Kelley > Signed-off-by: Kameron Carr > --- > arch/arm64/hyperv/mshyperv.c | 27 +++++++++++++++++++++++++-- > arch/arm64/include/asm/mshyperv.h | 4 ++++ > 2 files changed, 29 insertions(+), 2 deletions(-) >=20 > diff --git a/arch/arm64/hyperv/mshyperv.c b/arch/arm64/hyperv/mshyperv.c > index 82572c5..46ab2da 100644 > --- a/arch/arm64/hyperv/mshyperv.c > +++ b/arch/arm64/hyperv/mshyperv.c > @@ -14,12 +14,16 @@ > #include > #include > #include > +#include > #include > #include > #include >=20 > static bool hyperv_initialized; >=20 > +struct rsi_host_call *hv_hostcall_array; > +EXPORT_SYMBOL_GPL(hv_hostcall_array); > + > int hv_get_hypervisor_version(union hv_hypervisor_version_info *info) > { > hv_get_vpreg_128(HV_REGISTER_HYPERVISOR_VERSION, > @@ -110,6 +114,20 @@ static int __init hyperv_init(void) > if (!hyperv_detect_via_acpi() && !hyperv_detect_via_smccc()) > return 0; >=20 > + /* > + * The RSI host-call buffers are only ever used when > + * is_realm_world() is true. Skip the allocation on non-Realm > + * guests. A single contiguous array of nr_cpu_ids entries is > + * allocated; each CPU indexes into it by its processor ID. > + */ > + if (is_realm_world()) { > + hv_hostcall_array =3D kcalloc(nr_cpu_ids, > + sizeof(struct rsi_host_call), > + GFP_KERNEL); > + if (!hv_hostcall_array) > + return -ENOMEM; > + } > + > /* Setup the guest ID */ > guest_id =3D hv_generate_guest_id(LINUX_VERSION_CODE); > hv_set_vpreg(HV_REGISTER_GUEST_OS_ID, guest_id); > @@ -131,13 +149,13 @@ static int __init hyperv_init(void) >=20 > ret =3D hv_common_init(); > if (ret) > - return ret; > + goto free_hostcall_mem; >=20 > ret =3D cpuhp_setup_state(CPUHP_AP_HYPERV_ONLINE, > "arm64/hyperv_init:online", > hv_common_cpu_init, hv_common_cpu_die); > if (ret < 0) { > hv_common_free(); > - return ret; > + goto free_hostcall_mem; > } >=20 > if (ms_hyperv.priv_high & HV_ACCESS_PARTITION_ID) > @@ -150,6 +168,11 @@ static int __init hyperv_init(void) >=20 > hyperv_initialized =3D true; > return 0; > + > +free_hostcall_mem: > + kfree(hv_hostcall_array); > + hv_hostcall_array =3D NULL; > + return ret; > } >=20 > early_initcall(hyperv_init); > diff --git a/arch/arm64/include/asm/mshyperv.h > b/arch/arm64/include/asm/mshyperv.h > index b721d31..aed0aa5 100644 > --- a/arch/arm64/include/asm/mshyperv.h > +++ b/arch/arm64/include/asm/mshyperv.h > @@ -61,6 +61,10 @@ static inline u64 hv_get_non_nested_msr(unsigned int r= eg) > ARM_SMCCC_OWNER_VENDOR_HYP, \ > HV_SMCCC_FUNC_NUMBER) >=20 > +/* Per-CPU-indexed RSI host call structures for CCA Realms */ > +struct rsi_host_call; > +extern struct rsi_host_call *hv_hostcall_array; > + > #include >=20 > #endif > -- > 2.45.4 >=20