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From: Paul Burton <paul.burton@mips.com>
To: Chuanhong Guo <gch981213@gmail.com>
Cc: "linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>,
	Chuanhong Guo <gch981213@gmail.com>,
	Weijie Gao <hackpascal@gmail.com>,
	Ralf Baechle <ralf@linux-mips.org>,
	Paul Burton <pburton@wavecomp.com>,
	James Hogan <jhogan@kernel.org>, John Crispin <john@phrozen.org>,
	open list <linux-kernel@vger.kernel.org>,
	"linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>
Subject: Re: [PATCH v2] MIPS: ralink: fix cpu clock of mt7621 and add dt clk devices
Date: Thu, 4 Apr 2019 18:29:16 +0000	[thread overview]
Message-ID: <MWHPR2201MB12772FC62B0F8ED7F2061CEAC1500@MWHPR2201MB1277.namprd22.prod.outlook.com> (raw)
In-Reply-To: <20190321144251.28313-1-gch981213@gmail.com>

Hello,

Chuanhong Guo wrote:
> For a long time the mt7621 uses a fixed cpu clock which causes a problem
> if the cpu frequency is not 880MHz.
> 
> This patch fixes the cpu clock calculation and adds the cpu/bus clkdev
> which will be used in dts.
> 
> Signed-off-by: Weijie Gao <hackpascal@gmail.com>
> 
> Ported from OpenWrt:
> c7ca224299 ramips: fix cpu clock of mt7621 and add dt clk devices
> 
> Signed-off-by: Chuanhong Guo <gch981213@gmail.com>

Applied to mips-next.

Thanks,
    Paul

[ This message was auto-generated; if you believe anything is incorrect
  then please email paul.burton@mips.com to report it. ]

      parent reply	other threads:[~2019-04-04 18:29 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-21 14:42 Chuanhong Guo
2019-04-01 23:18 ` NeilBrown
2019-04-04 18:29 ` Paul Burton [this message]

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