From: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
To: Palmer Dabbelt <palmer@rivosinc.com>,
Conor Dooley <conor.dooley@microchip.com>
Cc: "llvm@lists.linux.dev" <llvm@lists.linux.dev>,
"oe-kbuild-all@lists.linux.dev" <oe-kbuild-all@lists.linux.dev>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
kernel test robot <lkp@intel.com>,
"Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Subject: RE: ld.lld: error: relocation R_RISCV_LO12_I cannot be used against symbol 'riscv_cbom_block_size'; recompile with -fPIC
Date: Mon, 11 Sep 2023 12:02:13 +0000 [thread overview]
Message-ID: <OSZPR01MB7019B9CB51DAE22757845D02AAF2A@OSZPR01MB7019.jpnprd01.prod.outlook.com> (raw)
In-Reply-To: <202309111311.8tcq3KVc-lkp@intel.com>
> Subject: ld.lld: error: relocation R_RISCV_LO12_I cannot be used against symbol
> 'riscv_cbom_block_size'; recompile with -fPIC
>
> tree:
> https://git.kernel.org/pub/scm/linux%252
> Fkernel%2Fgit%2Ftorvalds%2Flinux.git&data=05%7C01%7Cprabhakar.mahadev-
> lad.rj%40bp.renesas.com%7Cecec6b2c35b049d7fd8108dbb28c01c7%7C53d82571da1947e49cb4625a166a4a2a%7C0%7C0%
> 7C638300086620501123%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXV
> CI6Mn0%3D%7C3000%7C%7C%7C&sdata=xoUqGHQlVoylBC9zBnMRblMOE%2Bt9rDia1H4WCkBkxCQ%3D&reserved=0 master
> head: 0bb80ecc33a8fb5a682236443c1e740d5c917d1d
> commit: e021ae7f5145d46ab64cb058cbffda31059f37e5 riscv: errata: Add Andes alternative ports
> date: 10 days ago
> config: riscv-randconfig-r022-20230911
> (https://download.01.org/0day-
> ci%2Farchive%2F20230911%2F202309111311.8tcq3KVc-
> lkp%40intel.com%2Fconfig&data=05%7C01%7Cprabhakar.mahadev-
> lad.rj%40bp.renesas.com%7Cecec6b2c35b049d7fd8108dbb28c01c7%7C53d82571da1947e49cb4625a166a4a2a%7C0%7C0%
> 7C638300086620501123%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXV
> CI6Mn0%3D%7C3000%7C%7C%7C&sdata=aRG4VodlKMfr0bONuloMO1w6MfUR38dzZopDwfwhS%2Fg%3D&reserved=0)
> compiler: clang version 14.0.6
> (https://github.com/llvm/llvm-
> project.git&data=05%7C01%7Cprabhakar.mahadev-
> lad.rj%40bp.renesas.com%7Cecec6b2c35b049d7fd8108dbb28c01c7%7C53d82571da1947e49cb4625a166a4a2a%7C0%7C0%
> 7C638300086620501123%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXV
> CI6Mn0%3D%7C3000%7C%7C%7C&sdata=rsx5fturDhSNLJMpH0%2B4Zw81HUTCQhE4F4ozqFmFHic%3D&reserved=0
> f28c006a5895fc0e329fe15fead81e37457cb1d1)
> reproduce (this is a W=1 build):
> (https://download.01.org/0day-
> ci%2Farchive%2F20230911%2F202309111311.8tcq3KVc-
> lkp%40intel.com%2Freproduce&data=05%7C01%7Cprabhakar.mahadev-
> lad.rj%40bp.renesas.com%7Cecec6b2c35b049d7fd8108dbb28c01c7%7C53d82571da1947e49cb4625a166a4a2a%7C0%7C0%
> 7C638300086620501123%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXV
> CI6Mn0%3D%7C3000%7C%7C%7C&sdata=GqbK0Gqs5bZx%2FKH44rtc8OW81JPDXx%2BjrTMrPTdnF80%3D&reserved=0)
>
> If you fix the issue in a separate patch/commit (i.e. not just a new version of the same
> patch/commit), kindly add following tags
> | Reported-by: kernel test robot <lkp@intel.com>
> | Closes:
> | https://lore/
> | .kernel.org%2Foe-kbuild-all%2F202309111311.8tcq3KVc-lkp%40intel.com%2F
> | &data=05%7C01%7Cprabhakar.mahadev-lad.rj%40bp.renesas.com%7Cecec6b2c35
> | b049d7fd8108dbb28c01c7%7C53d82571da1947e49cb4625a166a4a2a%7C0%7C0%7C63
> | 8300086620501123%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV
> | 2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=rk6abxEzTc
> | XeOYIVw0WOJ8IvdTPwPC94r68eFcIihEs%3D&reserved=0
>
> All errors (new ones prefixed by >>):
>
> >> ld.lld: error: relocation R_RISCV_LO12_I cannot be used against
> >> symbol 'riscv_cbom_block_size'; recompile with -fPIC
> >>> defined in vmlinux.a(arch/riscv/mm/cacheflush.o)
> >>> referenced by errata.c
> >>> arch/riscv/errata/andes/errata.o:(andes_errata_patch_func) in archive vmlinux.a
>
I did reproduce this issue locally. The andes errata is not compiled as medany. The config is RELOCATABLE + MEDLOW. I can see the cacheflush.o is compiled with medany flag.
I can fix the build by adding a medany flag as below:
+#ifdef CONFIG_RISCV_ALTERNATIVE_EARLY
+CFLAGS_errata.o := -mcmodel=medany
#endif
But I am not sure if this is correct approach. Any pointers on this?
Cheers,
Prabhakar
prev parent reply other threads:[~2023-09-11 22:43 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-11 5:57 kernel test robot
2023-09-11 12:02 ` Prabhakar Mahadev Lad [this message]
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