RE: [PATCH v3 08/10] dt-bindings: arm: Add HPE GXP CPU Init

["Hawkins, Nick" <nick.hawkins@hpe.com>]

-----Original Message-----
From: Krzysztof Kozlowski [mailto:krzysztof.kozlowski@canonical.com] 
Sent: Friday, March 11, 2022 4:22 AM
To: Hawkins, Nick <nick.hawkins@hpe.com>>; Verdun, Jean-Marie <verdun@hpe.com>>
Cc: Rob Herring <robh+dt@kernel.org>>; devicetree@vger.kernel.org; linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 08/10] dt-bindings: arm: Add HPE GXP CPU Init

On 10/03/2022 20:52, nick.hawkins@hpe.com wrote:
>> From: Nick Hawkins <nick.hawkins@hpe.com>>
>> 
>> This adds support for the hpe,gxp-cpu-init binding.
>> With the HPE GXP initialization it is necessary to have access to this 
>> register for it to boot.
>> 
>> Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>>
>> ---
>>  .../cpu-enable-method/hpe,gxp-cpu-init.yaml   | 31 +++++++++++++++++++
>>  1 file changed, 31 insertions(+)
>>  create mode 100644 
>> Documentation/devicetree/bindings/arm/cpu-enable-method/hpe,gxp-cpu-in
>> it.yaml
>> 
>> diff --git 
>> a/Documentation/devicetree/bindings/arm/cpu-enable-method/hpe,gxp-cpu-
>> init.yaml 
>> b/Documentation/devicetree/bindings/arm/cpu-enable-method/hpe,gxp-cpu-
>> init.yaml
>> new file mode 100644
>> index 000000000000..a17c3fcc5421
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/arm/cpu-enable-method/hpe,gxp-
>> +++ cpu-init.yaml
>> @@ -0,0 +1,31 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
>> +---
>> +$id: 
>> +INVALID URI REMOVED
>> +ble-method/hpe,gxp-cpu-init.yaml*__;Iw!!NpxR!110gfGDYqJKEHiiJCXcAxkJJ
>> +uv62JykkON1xXN-Gdv6p4hn6fm7y8WHCy6w2GSFt$
>> +$schema: 
>> +INVALID URI REMOVED
>> +aml*__;Iw!!NpxR!110gfGDYqJKEHiiJCXcAxkJJuv62JykkON1xXN-Gdv6p4hn6fm7y8
>> +WHCy25gpjJ0$
>> +
>> +title: Initialize GXP CPU

> Please explain what's this. The bindings describe the hardware and I cannot get what is this here about. Is it a CPU enable method (like in cpus.yaml)? Is it some power management block?

This was intended to be a binding that would provide the necessary register to boot the asic. I have now moved this functionality into our bootloader. Thus this binding is no longer needed and will be removed from subsequent versions of this patch series.

Thanks,

-Nick