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SG2044 SoC To: Inochi Amaoto , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Johan Hovold , Shashank Babu Chinta Venkata , Niklas Cassel Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, sophgo@lists.linux.dev, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Yixun Lan , Longbin Li References: <20250304071239.352486-1-inochiama@gmail.com> From: Chen Wang In-Reply-To: <20250304071239.352486-1-inochiama@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: TY2PR0101CA0004.apcprd01.prod.exchangelabs.com (2603:1096:404:92::16) To PN0PR01MB10393.INDPRD01.PROD.OUTLOOK.COM (2603:1096:c01:1eb::14) X-Microsoft-Original-Message-ID: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 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X-OriginatorOrg: outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: a49b3459-ea8d-4fca-a4a7-08dd5af1bafc X-MS-Exchange-CrossTenant-AuthSource: PN0PR01MB10393.INDPRD01.PROD.OUTLOOK.COM X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Mar 2025 07:54:02.9615 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 84df9e7f-e9f6-40af-b435-aaaaaaaaaaaa X-MS-Exchange-CrossTenant-RMS-PersistedConsumerOrg: 00000000-0000-0000-0000-000000000000 X-MS-Exchange-Transport-CrossTenantHeadersStamped: PN0PR01MB5495 I think it should be v2, right? :) On 2025/3/4 15:12, Inochi Amaoto wrote: > Sophgo's SG2044 SoC uses Synopsys Designware PCIe core > to implement RC mode. > > For legacy interrupt, the PCIe controller on SG2044 implement > its own legacy interrupt controller. For MSI/MSI-X, it use an > external interrupt controller to handle. > > The external MSI interrupt controller patch can be found on [1]. > As SG2044 needs a mirror change to support the way to send MSI > message and different irq number. > > [1] https://lore.kernel.org/all/20250303111648.1337543-1-inochiama@gmail.com > > Changed from v1: > - https://lore.kernel.org/all/20250221013758.370936-1-inochiama@gmail.comq > 1. patch 1: remove dma-coherent property > 2. patch 2: remove unused reset > 3. patch 2: fix Kconfig menu title and reorder the entry > 4. patch 2: use FIELD_GET/FIELD_PREP to simplify the code. > 5. patch 2: rename the irq handle function to match the irq_chip name > > Inochi Amaoto (2): > dt-bindings: pci: Add Sophgo SG2044 PCIe host > PCI: sophgo-dwc: Add Sophgo SG2044 PCIe driver > > .../bindings/pci/sophgo,sg2044-pcie.yaml | 122 ++++++++ > drivers/pci/controller/dwc/Kconfig | 10 + > drivers/pci/controller/dwc/Makefile | 1 + > drivers/pci/controller/dwc/pcie-dw-sophgo.c | 270 ++++++++++++++++++ > 4 files changed, 403 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pci/sophgo,sg2044-pcie.yaml > create mode 100644 drivers/pci/controller/dwc/pcie-dw-sophgo.c > > -- > 2.48.1 >