From: Chen Wang <unicorn_wang@outlook.com>
To: Zixian Zeng <sycamoremoon376@gmail.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Inochi Amaoto <inochiama@outlook.com>,
Alexandre Ghiti <alex@ghiti.fr>
Cc: devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, sophgo@lists.linux.dev,
chao.wei@sophgo.com, xiaoguang.xing@sophgo.com
Subject: Re: [PATCH v2] riscv: sophgo: dts: Add spi controller for SG2042
Date: Tue, 4 Mar 2025 11:06:16 +0800 [thread overview]
Message-ID: <PN0PR01MB103931A586C8213740F2496D9FEC82@PN0PR01MB10393.INDPRD01.PROD.OUTLOOK.COM> (raw)
In-Reply-To: <20250228-sfg-spi-v2-1-8bbf23b85d0e@gmail.com>
On 2025/2/28 20:40, Zixian Zeng wrote:
> Add spi controllers for SG2042.
>
> SG2042 uses the upstreamed Synopsys DW SPI IP.
>
> Signed-off-by: Zixian Zeng <sycamoremoon376@gmail.com>
> ---
> For this spi controller patch, only bindings are included.
> This is tested on milkv-pioneer board. Using driver/spi/spidev.c
> for creating /dev/spidevX.Y and tools/spi/spidev_test for testing
> functionality.
> ---
> Changes in v2:
> - rebase v1 to sophgo/master(github.com/sophgo/linux.git).
> - order properties in device node.
> - remove unevaluated properties `clock-frequency`.
> - set default status to disable.
> - Link to v1: https://lore.kernel.org/r/20250228-sfg-spi-v1-1-b989aed94911@gmail.com
> ---
> .../riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts | 8 +++++++
> arch/riscv/boot/dts/sophgo/sg2042.dtsi | 28 ++++++++++++++++++++++
> 2 files changed, 36 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts b/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts
> index be596d01ff8d33bcdbe431d9731a55ee190ad5b3..c43a807af2f827b5267afe5e4fdf6e9e857dfa20 100644
> --- a/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts
> +++ b/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts
> @@ -72,6 +72,14 @@ &uart0 {
> status = "okay";
> };
>
> +&spi0 {
> + status = "okay";
> +};
> +
> +&spi1 {
> + status = "okay";
> +};
> +
Pioneerbox doesn't use these SPI controllers, so just drop this change
and keep the change for sg2042.dtsi should be fine.
Thanks,
Chen
> / {
> thermal-zones {
> soc-thermal {
> diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
> index e62ac51ac55abd922b5ef796ba8c2196383850c4..500645147b1f8ed0a08ad3cafb38ea79cf57d737 100644
> --- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
> @@ -545,5 +545,33 @@ sd: mmc@704002b000 {
> "timer";
> status = "disabled";
> };
> +
> + spi0: spi@7040004000 {
> + compatible = "snps,dw-apb-ssi";
> + reg = <0x70 0x40004000 0x00 0x1000>;
> + clocks = <&clkgen GATE_CLK_APB_SPI>,
> + <&clkgen GATE_CLK_SYSDMA_AXI>;
> + interrupt-parent = <&intc>;
> + interrupts = <110 IRQ_TYPE_LEVEL_HIGH>;
> + #address-cells = <0x01>;
> + #size-cells = <0x00>;
> + num-cs = <0x02>;
> + resets = <&rstgen RST_SPI0>;
> + status = "disabled";
> + };
> +
> + spi1: spi@7040005000 {
> + compatible = "snps,dw-apb-ssi";
> + reg = <0x70 0x40005000 0x00 0x1000>;
> + clocks = <&clkgen GATE_CLK_APB_SPI>,
> + <&clkgen GATE_CLK_SYSDMA_AXI>;
> + interrupt-parent = <&intc>;
> + interrupts = <111 IRQ_TYPE_LEVEL_HIGH>;
> + #address-cells = <0x01>;
> + #size-cells = <0x00>;
> + num-cs = <0x02>;
> + resets = <&rstgen RST_SPI1>;
> + status = "disabled";
> + };
> };
> };
>
> ---
> base-commit: aa5ee7180ec41bb77c3e327e95d119f2294babea
> change-id: 20250228-sfg-spi-e3f2aeca09ab
>
> Best regards,
prev parent reply other threads:[~2025-03-04 3:06 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-28 12:40 Zixian Zeng
2025-02-28 18:22 ` Conor Dooley
2025-03-01 1:58 ` Chen Wang
2025-03-03 9:08 ` Conor Dooley
2025-03-01 13:41 ` damon
2025-03-03 9:12 ` Conor Dooley
2025-03-02 2:18 ` Inochi Amaoto
2025-03-04 6:36 ` Zixian Zeng
2025-03-04 3:06 ` Chen Wang [this message]
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