From: Ingo Molnar <mingo@redhat.com>
To: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
Cc: Manfred <manfred@colorfullife.com>, <linux-kernel@vger.kernel.org>
Subject: Re: mpparse.c question
Date: Fri, 2 Feb 2001 12:45:43 -0500 (EST) [thread overview]
Message-ID: <Pine.LNX.4.32.0102021243440.1529-100000@devserv.devel.redhat.com> (raw)
In-Reply-To: <Pine.GSO.3.96.1010202174717.28509O-100000@delta.ds2.pg.gda.pl>
On Fri, 2 Feb 2001, Maciej W. Rozycki wrote:
> > Can that happen, is that important?
> >
> > Silly question: Why can't we ignore all but the first pin? If we don't
> > enable the additional pins, we don't have to disable them during
> > disable_irq().
>
> Possibly yes -- I haven't seen such a system.
it does exist, and the feature fixed a real bug. I dont remember which
system exactly :-|
> > Btw, is is correct that the isa irq's are always connected to the first
> > io apic? find_isa_irq_pin() doesn't handle that, and the caller just
> > access io apic 0.
>
> It appears it happens so for all systems checked so far. The MPS does
> not seem to enforce this configuration, so we might relax this
> dependency for flexibility. Note that not only find_isa_irq_pin()
> hardcodes this assumption -- setup_ExtINT_IRQ0_pin() does as well, for
> example.
(hm, dont we have an assert in there to catch ISA IRQs bound to the second
IO-APIC?) In any case, it would be a very surprising move if anyone added
a second IO-APIC for the sake of *ISA* devices. This would be truly
backwards.
Ingo
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next prev parent reply other threads:[~2001-02-02 17:49 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2001-02-02 16:04 Manfred
2001-02-02 17:16 ` Maciej W. Rozycki
2001-02-02 17:45 ` Ingo Molnar [this message]
2001-02-02 18:20 ` Maciej W. Rozycki
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