Re: 2.4.21 on Itanium2: floating-point assist fault at ip 400000000062ada1, isr 0000020000000008

["Richard B. Johnson" <root@chaos.analogic.com>]

On Wed, 31 Mar 2004, David Mosberger wrote:

> >>>>> On Wed, 31 Mar 2004 13:53:13 -0500 (EST), "Richard B. Johnson" <root@chaos.analogic.com> said:
>
>   Richard> The power-on or hardware-reset default for the ix86 FPU
>   Richard> is to attempt to handle div 0 errors transparently.
>
> I must be missing something.  So far I haven't seen anything that
> would suggest the FPSWA faults were due to infinities.  I'd guess that
> it's much more likely that they're due to denormals.
>
> 	--david


ftp://download.intel.com/design/Itanium/Downloads/24541401.pfd

	"Itanium Processor Floating-point Software Assistance
	and Floating-Point Exception Handling"


Any FPU fault gets trapped to this code. Nans, Denormals, Overflow,
Inexact, etc., everything....

The reading of 2.2 may not be clear, but further reading will
show that anything that didn't go according to plan gets trapped
to the "Software Assistance" Handler. Writing a message about
the trap to a log-file is a BUG! The handler should just do
whatever it's supposed to do!

Cheers,
Dick Johnson
Penguin : Linux version 2.4.24 on an i686 machine (797.90 BogoMips).
            Note 96.31% of all statistics are fiction.