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From: Jesper Dangaard Brouer <hawk@diku.dk>
To: netdev <netdev@vger.kernel.org>, linux-kernel@vger.kernel.org
Subject: Re: NIU driver: Sun x8 Express Quad Gigabit Ethernet Adapter
Date: Wed, 12 Nov 2008 22:31:43 +0100 (CET)	[thread overview]
Message-ID: <Pine.LNX.4.64.0811122213180.1212@ask.diku.dk> (raw)
In-Reply-To: <20081112.041143.11487260.davem@davemloft.net>


Hi Google,

On Wed, 12 Nov 2008, David Miller wrote:

> Guess what that does?  The packet counters live in the upper
> 32-bits and the MARK bits live in the lower 32-bits of the
> TX_CS register.
>
> So it first reads the packet counters, and as a side effect that
> clears the MARK bits in the TX_CS register.  So when we read the lower
> 32-bits the MARK bits are always seen as zero.

For the thorough reader, the TX_CS Transmit Control and Status register is 
described in table 26-15 page 761-762 in the PDF document titled: 
"UltraSPARC T2 supplement to UltraSPARC architecture 2007", downloadable 
from: 
http://opensparc-t2.sunsource.net/specs/UST2-UASuppl-current-draft-HP-EXT.pdf

Cheers,
   Jesper Brouer

--
-------------------------------------------------------------------
MSc. Master of Computer Science
Dept. of Computer Science, University of Copenhagen
Author of http://www.adsl-optimizer.dk
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       reply	other threads:[~2008-11-12 21:31 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20081112.014923.68124784.davem@davemloft.net>
     [not found] ` <1226487710.6834.53.camel@localhost.localdomain>
     [not found]   ` <20081112.035240.226243372.davem@davemloft.net>
     [not found]     ` <20081112.041143.11487260.davem@davemloft.net>
2008-11-12 21:31       ` Jesper Dangaard Brouer [this message]
2008-11-12 23:10         ` Matheos Worku
     [not found]       ` <1226572171.6834.87.camel@localhost.localdomain>
     [not found]         ` <20081113.141513.116537651.davem@davemloft.net>
2008-11-19 22:58           ` NIU driver: Sun x8 Express Quad Gigabit Ethernet Adapter (perf + regression IRQs) Jesper Dangaard Brouer
2008-11-19 23:11             ` David Miller
2008-11-20 19:48               ` Regression: Bisected, IRQ and MSI allocations screwed without sparse irq Jesper Dangaard Brouer
2008-11-21  0:34                 ` Thomas Gleixner
2008-11-21 10:33                   ` Jesper Dangaard Brouer
2008-11-21 16:40                     ` Thomas Gleixner
2008-11-21 19:35                       ` Jesper Dangaard Brouer
2008-11-21 21:11                         ` Thomas Gleixner
2008-11-21 23:06                         ` David Miller

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