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via RISC-V Svpbmt bits To: fangyu.yu@linux.alibaba.com, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, tjeznach@rivosinc.com, jgg@ziepe.ca, kevin.tian@intel.com, baolu.lu@linux.intel.com, vasant.hegde@amd.com Cc: guoren@kernel.org, iommu@lists.linux.dev, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org References: <20260411022223.91029-1-fangyu.yu@linux.alibaba.com> <20260411022223.91029-3-fangyu.yu@linux.alibaba.com> Content-Language: en-US From: "Nutty.Liu" In-Reply-To: <20260411022223.91029-3-fangyu.yu@linux.alibaba.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: TP0P295CA0035.TWNP295.PROD.OUTLOOK.COM (2603:1096:910:4::17) To SE3PR04MB8922.apcprd04.prod.outlook.com (2603:1096:101:2e9::7) X-Microsoft-Original-Message-ID: <46a2ab04-c145-4fbc-85e5-136f640af2c7@hotmail.com> Precedence: bulk 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X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Apr 2026 03:24:04.1801 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 84df9e7f-e9f6-40af-b435-aaaaaaaaaaaa X-MS-Exchange-CrossTenant-RMS-PersistedConsumerOrg: 00000000-0000-0000-0000-000000000000 X-MS-Exchange-Transport-CrossTenantHeadersStamped: TYSPR04MB7880 On 4/11/2026 10:22 AM, fangyu.yu@linux.alibaba.com wrote: > From: Fangyu Yu > > When the RISC-V IOMMU page table format support Svpbmt, PBMT provides > a way to tag mappings with page-based memory types. Encode memory type > via PBMT in RISC-V IOMMU PTEs: > > - IOMMU_MMIO -> PBMT=IO > - !IOMMU_CACHE -> PBMT=NC > - otherwise -> PBMT=Normal (PBMT=0) > > Clear the PBMT field before applying the selected encoding, and only > touch PBMT when PT_FEAT_RISCV_SVPBMT is advertised. > > Signed-off-by: Fangyu Yu > --- > drivers/iommu/generic_pt/fmt/riscv.h | 9 +++++++++ > 1 file changed, 9 insertions(+) Reviewed-by: Nutty Liu Thanks, Nutty