From: qaz6750 <qaz6750@outlook.com>
To: andersson@kernel.org, agross@kernel.org
Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, qaz6750 <qaz6750@outlook.com>
Subject: [PATCH] arm64: dts: qcom: sm8150: Fix the I2C7 interrupt
Date: Tue, 25 Jul 2023 00:21:44 +0800 [thread overview]
Message-ID: <SY7P282MB3787F073ED6E860E820C6CDDB202A@SY7P282MB3787.AUSP282.PROD.OUTLOOK.COM> (raw)
I2C6 and I2C7 use the same interrupts, which is incorrect.
In the downstream kernel, I2C7 has interrupts of 608 instead of 607.
Signed-off-by: qaz6750 <qaz6750@outlook.com>
---
arch/arm64/boot/dts/qcom/sm8150.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index 18c822abd..214f6e028 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -1231,7 +1231,7 @@ i2c7: i2c@89c000 {
dma-names = "tx", "rx";
pinctrl-names = "default";
pinctrl-0 = <&qup_i2c7_default>;
- interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
--
2.34.1
next reply other threads:[~2023-07-24 16:22 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-24 16:21 qaz6750 [this message]
2023-07-24 16:29 ` Konrad Dybcio
2023-07-24 16:52 ` Krzysztof Kozlowski
2023-07-24 16:53 ` Konrad Dybcio
2023-07-25 1:46 ` qaz6750
2023-07-25 2:33 ` [PATCH v2] " qaz6750 lzy
2023-07-25 5:30 ` Krzysztof Kozlowski
2023-07-25 5:55 ` qaz6750 lzy
2023-07-25 7:42 ` Konrad Dybcio
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