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Mon, 10 Jul 2023 16:46:13 +0000 Received: from TY3P286MB2611.JPNP286.PROD.OUTLOOK.COM ([fe80::3794:d6cb:1aa2:342e]) by TY3P286MB2611.JPNP286.PROD.OUTLOOK.COM ([fe80::3794:d6cb:1aa2:342e%7]) with mapi id 15.20.6565.028; Mon, 10 Jul 2023 16:46:13 +0000 Message-ID: Date: Tue, 11 Jul 2023 00:46:01 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.12.0 Cc: wiagn233@outlook.com, David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing , Paul Walmsley , Palmer Dabbelt , Albert Ou , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Philipp Zabel , Sumit Semwal , christian.koenig@amd.com, Bjorn Andersson , Heiko Stuebner , Shawn Guo , Jagan Teki , Chris Morgan , Jack Zhu , Shengyang Chen , Changhuang Liang Subject: Re: [PATCH 7/9] drm/verisilicon: Add drm plane funcs To: Keith Zhao , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-media@vger.kernel.org, linaro-mm-sig@lists.linaro.org References: <20230602074043.33872-1-keith.zhao@starfivetech.com> <20230602074043.33872-8-keith.zhao@starfivetech.com> From: Shengyu Qu In-Reply-To: <20230602074043.33872-8-keith.zhao@starfivetech.com> Content-Type: text/plain; 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> + unsigned char i, num_planes; > + struct drm_framebuffer *fb; > + struct vs_plane *vs_plane = to_vs_plane(plane); > + //struct drm_plane_state *state = plane->state; > + struct vs_crtc *vs_crtc = to_vs_crtc(new_state->crtc); > + struct vs_plane_state *plane_state = to_vs_plane_state(new_state); > + //struct drm_format_name_buf *name = &plane_state->status.format_name; > + > + if (!new_state->fb || !new_state->crtc) > + return; > + > + fb = new_state->fb; > + > + num_planes = vs_get_plane_number(fb); > + > + for (i = 0; i < num_planes; i++) { > + struct vs_gem_object *vs_obj; > + > + vs_obj = vs_fb_get_gem_obj(fb, i); > + vs_plane->dma_addr[i] = vs_obj->iova + fb->offsets[i]; There is a dcache flush operation here in downstream driver. Is that a cache coherence problem? Best regards, Shengyu > + } > + > + plane_state->status.src = drm_plane_state_src(new_state); > + plane_state->status.dest = drm_plane_state_dest(new_state); > + > + vs_plane->funcs->update(vs_crtc->dev, vs_plane, plane, state); > +} >