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Mon, 17 Jun 2024 13:35:22 +0000 Received: from TY3P286MB2754.JPNP286.PROD.OUTLOOK.COM ([fe80::670b:45a6:4c30:d899]) by TY3P286MB2754.JPNP286.PROD.OUTLOOK.COM ([fe80::670b:45a6:4c30:d899%4]) with mapi id 15.20.7677.030; Mon, 17 Jun 2024 13:35:22 +0000 From: Songyang Li To: helgaas@kernel.org Cc: bhelgaas@google.com, leesongyang@outlook.com, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Subject: Re: [PATCH] PCI: Cancel compilation restrictions on function pcie_clear_device_status Date: Mon, 17 Jun 2024 21:35:20 +0800 Message-ID: X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240615212603.GA1157372@bhelgaas> References: <20240615212603.GA1157372@bhelgaas> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-TMN: [2nef6F6a5KUuqYB3EYVbFVCiymH645im] X-ClientProxiedBy: OS3P301CA0044.JPNP301.PROD.OUTLOOK.COM (2603:1096:604:21e::16) To TY3P286MB2754.JPNP286.PROD.OUTLOOK.COM (2603:1096:400:256::8) X-Microsoft-Original-Message-ID: <20240617133520.10450-1-leesongyang@outlook.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: TY3P286MB2754:EE_|OSOP286MB4001:EE_ X-MS-Office365-Filtering-Correlation-Id: 2035cf15-ad52-46c6-2d5f-08dc8ed2560d X-Microsoft-Antispam: BCL:0;ARA:14566002|461199025|440099025|3412199022|1710799023; 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> > I think it may be more suitable to export the pcie_clear_device_status() > > for use in the driver code. > > If we want to use this from drivers, it would make sense to do > something like this patch, and this patch could be part of a series to > call it from the drivers. > > But at the same time, we should ask whether drivers should be clearing > this status themselves, or whether it should be done by the PCI core. After careful consideration, I agree with your point of view. I hold a viewpoint that it should be done by the PCI core, rather than pcie drivers. I give up this patch, and then I have gained a profound understanding of PCIe Core from this communication. Thanks, Songyang Li