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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-OriginatorOrg: bp.renesas.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: TY3PR01MB11346.jpnprd01.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 4fd935cd-275b-4708-4981-08dd7b54f75c X-MS-Exchange-CrossTenant-originalarrivaltime: 14 Apr 2025 13:05:01.3550 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 53d82571-da19-47e4-9cb4-625a166a4a2a X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: cNzmF4Yjtp2rImhlVQ6+V3c5UOQrcevzk97K/BqR/bWfLaJlLHzGLcpseTkR4U+cfBuN4TyuCkHQ1dStbqFsIkSGfvv5asFyHauqVBqHWBI= X-MS-Exchange-Transport-CrossTenantHeadersStamped: OSCPR01MB13229 Hi Prabhakar, Thanks for the patch. > -----Original Message----- > From: Prabhakar > Sent: 14 April 2025 14:00 > Subject: [PATCH v4 2/3] reset: Add USB2PHY port reset driver for Renesas = RZ/V2H(P) >=20 > From: Lad Prabhakar >=20 > Implement a USB2PHY port reset driver for the Renesas RZ/V2H(P) SoC. > Enable control of USB2.0 PHY reset and power-down operations, including a= ssert and deassert > functionalities for the PHY. >=20 > Leverage device tree (OF) data to support future SoCs with similar USB2PH= Y hardware but varying > register configurations. Define initialization values and control registe= r settings to ensure > flexibility for upcoming platforms. >=20 > Signed-off-by: Lad Prabhakar > --- > drivers/reset/Kconfig | 7 + > drivers/reset/Makefile | 1 + > drivers/reset/reset-rzv2h-usb2phy.c | 241 ++++++++++++++++++++++++++++ > 3 files changed, 249 insertions(+) > create mode 100644 drivers/reset/reset-rzv2h-usb2phy.c >=20 > diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 99f6f978= 4e68..6c7dbd8ca580 100644 > --- a/drivers/reset/Kconfig > +++ b/drivers/reset/Kconfig > @@ -225,6 +225,13 @@ config RESET_RZG2L_USBPHY_CTRL > Support for USBPHY Control found on RZ/G2L family. It mainly > controls reset and power down of the USB/PHY. >=20 > +config RESET_RZV2H_USB2PHY > + tristate "Renesas RZ/V2H(P) (and similar SoCs) USB2PHY Reset driver" > + depends on ARCH_RENESAS || COMPILE_TEST > + help > + Support for USB2PHY Port reset Control found on the RZ/V2H(P) SoC > + (and similar SoCs). > + > config RESET_SCMI > tristate "Reset driver controlled via ARM SCMI interface" > depends on ARM_SCMI_PROTOCOL || COMPILE_TEST diff --git a/drivers/reset= /Makefile > b/drivers/reset/Makefile index 31f9904d13f9..30d0fb4ac965 100644 > --- a/drivers/reset/Makefile > +++ b/drivers/reset/Makefile > @@ -31,6 +31,7 @@ obj-$(CONFIG_RESET_QCOM_AOSS) +=3D reset-qcom-aoss.o > obj-$(CONFIG_RESET_QCOM_PDC) +=3D reset-qcom-pdc.o > obj-$(CONFIG_RESET_RASPBERRYPI) +=3D reset-raspberrypi.o > obj-$(CONFIG_RESET_RZG2L_USBPHY_CTRL) +=3D reset-rzg2l-usbphy-ctrl.o > +obj-$(CONFIG_RESET_RZV2H_USB2PHY) +=3D reset-rzv2h-usb2phy.o > obj-$(CONFIG_RESET_SCMI) +=3D reset-scmi.o > obj-$(CONFIG_RESET_SIMPLE) +=3D reset-simple.o > obj-$(CONFIG_RESET_SOCFPGA) +=3D reset-socfpga.o diff --git a/drivers/re= set/reset-rzv2h-usb2phy.c > b/drivers/reset/reset-rzv2h-usb2phy.c > new file mode 100644 > index 000000000000..737b768829c9 > --- /dev/null > +++ b/drivers/reset/reset-rzv2h-usb2phy.c > @@ -0,0 +1,241 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Renesas RZ/V2H(P) USB2PHY Port reset control driver > + * > + * Copyright (C) 2025 Renesas Electronics Corporation */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +struct rzv2h_usb2phy_regval { > + u16 reg; > + u16 val; > +}; > + > +struct rzv2h_usb2phy_reset_of_data { > + const struct rzv2h_usb2phy_regval *init_vals; > + unsigned int init_val_count; > + > + u16 reset_reg; > + u16 reset_assert_val; > + u16 reset_deassert_val; > + u16 reset_status_bits; > + u16 reset_release_val; > + > + u16 reset2_reg; > + u16 reset2_acquire_val; > + u16 reset2_release_val; > +}; > + > +struct rzv2h_usb2phy_reset_priv { > + const struct rzv2h_usb2phy_reset_of_data *data; > + void __iomem *base; > + struct device *dev; > + struct reset_controller_dev rcdev; > + spinlock_t lock; /* protects register accesses */ }; > + > +static inline struct rzv2h_usb2phy_reset_priv > +*rzv2h_usbphy_rcdev_to_priv(struct reset_controller_dev *rcdev) { > + return container_of(rcdev, struct rzv2h_usb2phy_reset_priv, rcdev); } > + > +/* This function must be called only after pm_runtime_resume_and_get() > +has been called */ static void rzv2h_usbphy_assert_helper(struct > +rzv2h_usb2phy_reset_priv *priv) { > + const struct rzv2h_usb2phy_reset_of_data *data =3D priv->data; > + > + scoped_guard(spinlock, &priv->lock) { > + writel(data->reset2_acquire_val, priv->base + data->reset2_reg); > + writel(data->reset_assert_val, priv->base + data->reset_reg); > + } > + > + usleep_range(11, 20); > +} > + > +static int rzv2h_usbphy_reset_assert(struct reset_controller_dev *rcdev, > + unsigned long id) > +{ > + struct rzv2h_usb2phy_reset_priv *priv =3D rzv2h_usbphy_rcdev_to_priv(rc= dev); > + struct device *dev =3D priv->dev; > + int ret; > + > + ret =3D pm_runtime_resume_and_get(dev); > + if (ret) { > + dev_err(dev, "pm_runtime_resume_and_get failed\n"); > + return ret; > + } > + > + rzv2h_usbphy_assert_helper(priv); > + > + pm_runtime_put(dev); > + > + return 0; > +} > + > +static int rzv2h_usbphy_reset_deassert(struct reset_controller_dev *rcde= v, > + unsigned long id) > +{ > + struct rzv2h_usb2phy_reset_priv *priv =3D rzv2h_usbphy_rcdev_to_priv(rc= dev); > + const struct rzv2h_usb2phy_reset_of_data *data =3D priv->data; > + struct device *dev =3D priv->dev; > + int ret; > + > + ret =3D pm_runtime_resume_and_get(dev); > + if (ret) { > + dev_err(dev, "pm_runtime_resume_and_get failed\n"); > + return ret; > + } > + > + scoped_guard(spinlock, &priv->lock) { > + writel(data->reset_deassert_val, priv->base + data->reset_reg); > + writel(data->reset2_release_val, priv->base + data->reset2_reg); > + writel(data->reset_release_val, priv->base + data->reset_reg); > + } > + > + pm_runtime_put(dev); > + > + return 0; > +} > + > +static int rzv2h_usbphy_reset_status(struct reset_controller_dev *rcdev, > + unsigned long id) > +{ > + struct rzv2h_usb2phy_reset_priv *priv =3D rzv2h_usbphy_rcdev_to_priv(rc= dev); > + struct device *dev =3D priv->dev; > + int ret; > + u32 reg; > + > + ret =3D pm_runtime_resume_and_get(dev); > + if (ret) { > + dev_err(dev, "pm_runtime_resume_and_get failed\n"); > + return ret; > + } > + > + reg =3D readl(priv->base + priv->data->reset_reg); > + > + pm_runtime_put(dev); > + > + return (reg & priv->data->reset_status_bits) =3D=3D > +priv->data->reset_status_bits; } > + > +static const struct reset_control_ops rzv2h_usbphy_reset_ops =3D { > + .assert =3D rzv2h_usbphy_reset_assert, > + .deassert =3D rzv2h_usbphy_reset_deassert, > + .status =3D rzv2h_usbphy_reset_status, > +}; > + > +static int rzv2h_usb2phy_reset_of_xlate(struct reset_controller_dev *rcd= ev, > + const struct of_phandle_args *reset_spec) { > + /* No special handling needed, we have only one reset line per device *= / > + return 0; > +} > + > +static int rzv2h_usb2phy_reset_probe(struct platform_device *pdev) { > + const struct rzv2h_usb2phy_reset_of_data *data; > + struct rzv2h_usb2phy_reset_priv *priv; > + struct device *dev =3D &pdev->dev; > + struct reset_control *rstc; > + int error; > + > + priv =3D devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); > + if (!priv) > + return -ENOMEM; > + > + data =3D of_device_get_match_data(dev); > + if (!data) > + return dev_err_probe(dev, -ENODEV, > + "failed to match device\n"); This check is not needed as there is always data. With this addressed. Reviewed-by: Biju Das Cheers, Biju > + > + priv->data =3D data; > + priv->dev =3D dev; > + priv->base =3D devm_platform_ioremap_resource(pdev, 0); > + if (IS_ERR(priv->base)) > + return PTR_ERR(priv->base); > + > + rstc =3D devm_reset_control_get_shared_deasserted(dev, NULL); > + if (IS_ERR(rstc)) > + return dev_err_probe(dev, PTR_ERR(rstc), > + "failed to get deasserted reset\n"); > + > + spin_lock_init(&priv->lock); > + dev_set_drvdata(dev, priv); > + > + error =3D devm_pm_runtime_enable(dev); > + if (error) > + return dev_err_probe(dev, error, "Failed to enable pm_runtime\n"); > + > + error =3D pm_runtime_resume_and_get(dev); > + if (error) > + return dev_err_probe(dev, error, "pm_runtime_resume_and_get > +failed\n"); > + > + for (unsigned int i =3D 0; i < data->init_val_count; i++) > + writel(data->init_vals[i].val, priv->base + data->init_vals[i].reg); > + > + /* keep usb2phy in asserted state */ > + rzv2h_usbphy_assert_helper(priv); > + > + pm_runtime_put(dev); > + > + priv->rcdev.ops =3D &rzv2h_usbphy_reset_ops; > + priv->rcdev.of_reset_n_cells =3D 0; > + priv->rcdev.nr_resets =3D 1; > + priv->rcdev.of_xlate =3D rzv2h_usb2phy_reset_of_xlate; > + priv->rcdev.of_node =3D dev->of_node; > + priv->rcdev.dev =3D dev; > + > + return devm_reset_controller_register(dev, &priv->rcdev); } > + > +/* > + * initialization values required to prepare the PHY to receive > + * assert and deassert requests. > + */ > +static const struct rzv2h_usb2phy_regval rzv2h_init_vals[] =3D { > + { .reg =3D 0xc10, .val =3D 0x67c }, > + { .reg =3D 0xc14, .val =3D 0x1f }, > + { .reg =3D 0x600, .val =3D 0x909 }, > +}; > + > +static const struct rzv2h_usb2phy_reset_of_data rzv2h_reset_of_data =3D = { > + .init_vals =3D rzv2h_init_vals, > + .init_val_count =3D ARRAY_SIZE(rzv2h_init_vals), > + .reset_reg =3D 0, > + .reset_assert_val =3D 0x206, > + .reset_status_bits =3D BIT(2), > + .reset_deassert_val =3D 0x200, > + .reset_release_val =3D 0x0, > + .reset2_reg =3D 0xb04, > + .reset2_acquire_val =3D 0x303, > + .reset2_release_val =3D 0x3, > +}; > + > +static const struct of_device_id rzv2h_usb2phy_reset_of_match[] =3D { > + { .compatible =3D "renesas,r9a09g057-usb2phy-reset", .data =3D &rzv2h_r= eset_of_data }, > + { /* Sentinel */ } > +}; > +MODULE_DEVICE_TABLE(of, rzv2h_usb2phy_reset_of_match); > + > +static struct platform_driver rzv2h_usb2phy_reset_driver =3D { > + .driver =3D { > + .name =3D "rzv2h_usb2phy_reset", > + .of_match_table =3D rzv2h_usb2phy_reset_of_match, > + }, > + .probe =3D rzv2h_usb2phy_reset_probe, > +}; > +module_platform_driver(rzv2h_usb2phy_reset_driver); > + > +MODULE_LICENSE("GPL"); > +MODULE_AUTHOR("Lad Prabhakar > +"); > +MODULE_DESCRIPTION("Renesas RZ/V2H(P) USB2PHY Control"); > -- > 2.49.0