From: "Kazuhiro Abe (Fujitsu)" <fj1078ii@fujitsu.com>
To: 'Hanjun Guo' <guohanjun@huawei.com>,
'Ilkka Koskinen' <ilkka@os.amperecomputing.com>,
'Sudeep Holla' <sudeep.holla@arm.com>
Cc: 'Lorenzo Pieralisi' <lpieralisi@kernel.org>,
"'Rafael J. Wysocki'" <rafael@kernel.org>,
'Len Brown' <lenb@kernel.org>,
"'linux-acpi@vger.kernel.org'" <linux-acpi@vger.kernel.org>,
"'linux-arm-kernel@lists.infradead.org'"
<linux-arm-kernel@lists.infradead.org>,
"'linux-kernel@vger.kernel.org'" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH v3] ACPI: AGDI: Add interrupt signaling mode support
Date: Mon, 29 Sep 2025 09:31:43 +0000 [thread overview]
Message-ID: <TY3PR01MB9983121D6F4EC2324C4367CAD51BA@TY3PR01MB9983.jpnprd01.prod.outlook.com> (raw)
In-Reply-To: <b8ab020f-8298-cadd-70ee-9325c32b968f@huawei.com>
Hi Hanjun,
> > Hi Hanjun,
> >
> >>> Hi Hanjun & Sudeep
> >>>
> >>>> Hi Ilkka
> >>>>
> >>>>> Hi Kazuhiro,
> >>>>>
> >>>>> On Fri, 5 Sep 2025, Kazuhiro Abe wrote:
> >>>>>> AGDI has two types of signaling modes: SDEI and interrupt.
> >>>>>> Currently, the AGDI driver only supports SDEI.
> >>>>>> Therefore, add support for interrupt signaling mode The interrupt
> >>>>>> vector is retrieved from the AGDI table, and call panic function
> >>>>>> when an interrupt occurs.
> >>>>>>
> >>>>>> Signed-off-by: Kazuhiro Abe<fj1078ii@aa.jp.fujitsu.com>
> >>>>>
> >>>>> Looks good to me.
> >>>>>
> >>>>> Reviewed-by: Ilkka Koskinen<ilkka@os.amperecomputing.com>
> >>>>>
> >>>> Thanks for your review.
> >>>>
> >>>> Best Regards,
> >>>> Kazuhiro Abe
> >>>>
> >>>>> Hanjun & Sudeep, what's your thought on enabling the use of regular
> >>>>> interrupts here? I do agree the spec talks about non-maskable ones
> >>>>> and to my understanding that's what the idea was indeed.
> >>> Do you have any thoughts on this matter?
> >> For the real use case, if the system is in failure state, for example, the system
> is
> >> panic, the CPU will not handle regular interrupts, so what's the use case do
> you
> >> have to use regular interrupt?
> > This driver is designed to operate with NMI enabled.
> >
> > However, on current ARM64 platforms, NMI functionality may not be active
> unless
> > "pseudo NMI" is explicitly specified via a kernel command-line parameter.
> > In such scenarios, we've included regular interrupt handling as a last resort,
> > anticipating rare cases where some cores might still be able to receive regular
> > interrupts even if other cores are unresponsive.
> >
> > To reiterate, the underlying assumption is that NMI(now pseudo NMI) is
> enabled for use.
>
> OK. Please send a new version, I will ack it
> if you address my comments.
Thanks for your comment.
I will send a new version with your comments addressed after 6.18-rc1 is released.
Best Regards,
Kazuhiro Abe
>
> Thanks
> Hanjun
next prev parent reply other threads:[~2025-09-29 9:33 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-05 4:27 Kazuhiro Abe
2025-09-08 19:02 ` Ilkka Koskinen
2025-09-11 6:57 ` Kazuhiro Abe (Fujitsu)
2025-09-19 5:05 ` Kazuhiro Abe (Fujitsu)
2025-09-27 2:55 ` Hanjun Guo
2025-09-29 7:32 ` Kazuhiro Abe (Fujitsu)
2025-09-29 9:03 ` Hanjun Guo
2025-09-29 9:31 ` Kazuhiro Abe (Fujitsu) [this message]
2025-09-27 2:45 ` Hanjun Guo
2025-09-29 7:23 ` Kazuhiro Abe (Fujitsu)
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