From: Biju Das <biju.das.jz@bp.renesas.com>
To: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>,
Magnus Damm <magnus.damm@gmail.com>,
Linus Walleij <linus.walleij@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
"linux-renesas-soc@vger.kernel.org"
<linux-renesas-soc@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>,
Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: RE: [PATCH v4 3/4] pinctrl: renesas: pinctrl-rzg2l: Add the missing port pins P19 to P28
Date: Fri, 12 Jan 2024 17:10:40 +0000 [thread overview]
Message-ID: <TYCPR01MB11269F75A63DB020297DF21DA866F2@TYCPR01MB11269.jpnprd01.prod.outlook.com> (raw)
In-Reply-To: <CA+V-a8smkiub9ACDsqxv0z8yF_iLVEXG2OHwS7iJ+tmsdmTQ6g@mail.gmail.com>
> -----Original Message-----
> From: Lad, Prabhakar <prabhakar.csengg@gmail.com>
> Sent: Friday, January 12, 2024 5:06 PM
> Subject: Re: [PATCH v4 3/4] pinctrl: renesas: pinctrl-rzg2l: Add the
> missing port pins P19 to P28
>
> Hi Biju,
>
> Thank you for the review.
>
> On Fri, Jan 12, 2024 at 2:31 PM Biju Das <biju.das.jz@bp.renesas.com>
> wrote:
> >
> >
> > Hi Prabhakar,
> >
> > > -----Original Message-----
> > > From: Prabhakar <prabhakar.csengg@gmail.com>
> > > Sent: Friday, January 12, 2024 2:26 PM
> > > Subject: [PATCH v4 3/4] pinctrl: renesas: pinctrl-rzg2l: Add the
> > > missing port pins P19 to P28
> > >
> <snip>
> > >
> > > +/**
> > > + * struct rzg2l_variable_pin_cfg - pin data cfg
> > > + * @cfg: port pin configuration
> > > + * @port: port number
> > > + * @pin: port pin
> > > + */
> > > +struct rzg2l_variable_pin_cfg {
> > > + u32 cfg:20;
> > > + u8 port:5;
> >
> > u32 ??
> This is done based on the feedback provided previously by Geert [0].
>
> > > + u8 pin:5;
> >
> > u32 ??
> >
> ditto.
>
As per[0] suggestion is,
As cfg only contains the lower bits (PIN_CFG_*), I think you can fit
everything in a u32:
u32 cfg: 20;
u32 port: 5;
u32 pin: 3;
Cheers,
Biju
next prev parent reply other threads:[~2024-01-12 17:10 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-12 14:26 [PATCH v4 0/4] Add missing port pins for RZ/Five SoC Prabhakar
2024-01-12 14:26 ` [PATCH v4 1/4] pinctrl: renesas: rzg2l: Improve code for readability Prabhakar
2024-01-12 14:26 ` [PATCH v4 2/4] pinctrl: renesas: rzg2l: Include pinmap in RZG2L_GPIO_PORT_PACK() macro Prabhakar
2024-01-13 11:43 ` kernel test robot
2024-01-12 14:26 ` [PATCH v4 3/4] pinctrl: renesas: pinctrl-rzg2l: Add the missing port pins P19 to P28 Prabhakar
2024-01-12 14:31 ` Biju Das
2024-01-12 17:05 ` Lad, Prabhakar
2024-01-12 17:10 ` Biju Das [this message]
2024-01-12 17:14 ` Lad, Prabhakar
2024-01-13 14:59 ` kernel test robot
2024-01-13 20:40 ` kernel test robot
2024-01-12 14:26 ` [PATCH v4 4/4] riscv: dts: renesas: r9a07g043f: Update gpio-ranges property Prabhakar
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