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bh=z2a//vbx02dnoOU0YhJ2gBNN0pCy6Yyor1PmiIs8Qt0=; b=ZdjARC4H6Kv1HYsHyuwIHCFH9p+me9N3VCQJxtzz90/8yjQ4m/3dZKc19X8TuwMAZklEXG6QuBz7aO+2nopM/jFSUlkTKZpllMyiRg9UyNfO4R+ieZZyNBM/eOk5LfRCjtoqxMX+dKj4P9lew3isn3rUoqpUijlI70ohaWFqZFo= Received: from TYCPR01MB11332.jpnprd01.prod.outlook.com (2603:1096:400:3c0::7) by TYWPR01MB8807.jpnprd01.prod.outlook.com (2603:1096:400:16c::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8137.27; Sun, 10 Nov 2024 08:33:50 +0000 Received: from TYCPR01MB11332.jpnprd01.prod.outlook.com ([fe80::7497:30af:3081:1479]) by TYCPR01MB11332.jpnprd01.prod.outlook.com ([fe80::7497:30af:3081:1479%4]) with mapi id 15.20.8137.019; Sun, 10 Nov 2024 08:33:50 +0000 From: Biju Das To: Claudiu.Beznea , "geert+renesas@glider.be" , "mturquette@baylibre.com" , "sboyd@kernel.org" , "robh@kernel.org" , "krzk+dt@kernel.org" , "conor+dt@kernel.org" , Prabhakar Mahadev Lad , "lgirdwood@gmail.com" , "broonie@kernel.org" , "magnus.damm@gmail.com" , "linus.walleij@linaro.org" , "perex@perex.cz" , "tiwai@suse.com" , "p.zabel@pengutronix.de" CC: "linux-renesas-soc@vger.kernel.org" , "linux-clk@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-sound@vger.kernel.org" , "linux-gpio@vger.kernel.org" , Claudiu.Beznea , Claudiu Beznea Subject: RE: [PATCH v2 05/25] pinctrl: renesas: rzg2l: Add audio clock pins Thread-Topic: [PATCH v2 05/25] pinctrl: renesas: rzg2l: Add audio clock pins Thread-Index: AQHbMcwGxLNsq4zxjkmF9Ri6pfuKYLKwMtJg Date: Sun, 10 Nov 2024 08:33:50 +0000 Message-ID: References: <20241108104958.2931943-1-claudiu.beznea.uj@bp.renesas.com> <20241108104958.2931943-6-claudiu.beznea.uj@bp.renesas.com> In-Reply-To: <20241108104958.2931943-6-claudiu.beznea.uj@bp.renesas.com> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=bp.renesas.com; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-OriginatorOrg: bp.renesas.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: TYCPR01MB11332.jpnprd01.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: d29932a3-85d0-4de1-a1ea-08dd0162671b X-MS-Exchange-CrossTenant-originalarrivaltime: 10 Nov 2024 08:33:50.4205 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 53d82571-da19-47e4-9cb4-625a166a4a2a X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: YyK9Ag/mlOBI7NOAktPRWNcy8i0la8/4ADltJ2EIkbSMrkNzczIVxqEn87gEVh6yVec1/pbxfH9xn8kKIqznubhGPDdXuODzHLw/FOm1nsc= X-MS-Exchange-Transport-CrossTenantHeadersStamped: TYWPR01MB8807 Hi Claudiu, Thanks for the patch. > -----Original Message----- > From: Claudiu > Sent: 08 November 2024 10:50 > Subject: [PATCH v2 05/25] pinctrl: renesas: rzg2l: Add audio clock pins >=20 > From: Claudiu Beznea >=20 > Add audio clock pins. These are used by audio IPs as input pins to feed t= hem with audio clocks. >=20 > Signed-off-by: Claudiu Beznea Reviewed-by: Biju Das Cheers, Biju > --- >=20 > Changes in v2: > - none >=20 > drivers/pinctrl/renesas/pinctrl-rzg2l.c | 2 ++ > 1 file changed, 2 insertions(+) >=20 > diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/re= nesas/pinctrl-rzg2l.c > index 8ffb9430a134..1190ca4b1808 100644 > --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c > +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c > @@ -2086,6 +2086,8 @@ static const struct rzg2l_dedicated_configs rzg3s_d= edicated_pins[] =3D { > PIN_CFG_SOFT_PS)) }, > { "TDO", RZG2L_SINGLE_PIN_PACK(0x1, 1, (PIN_CFG_IOLH_A | PIN_CFG_SOFT_P= S)) }, > { "WDTOVF_PERROUT#", RZG2L_SINGLE_PIN_PACK(0x6, 0, PIN_CFG_IOLH_A | PIN= _CFG_SOFT_PS) }, > + { "AUDIO_CLK1", RZG2L_SINGLE_PIN_PACK(0x2, 0, PIN_CFG_IEN) }, > + { "AUDIO_CLK2", RZG2L_SINGLE_PIN_PACK(0x2, 1, PIN_CFG_IEN) }, > { "SD0_CLK", RZG2L_SINGLE_PIN_PACK(0x10, 0, (PIN_CFG_IOLH_B | PIN_CFG_I= O_VMC_SD0)) }, > { "SD0_CMD", RZG2L_SINGLE_PIN_PACK(0x10, 1, (PIN_CFG_IOLH_B | PIN_CFG_I= EN | > PIN_CFG_IO_VMC_SD0)) }, > -- > 2.39.2