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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-OriginatorOrg: bp.renesas.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: TYCPR01MB11332.jpnprd01.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 706726af-ecab-43d6-bff0-08dc968f67fe X-MS-Exchange-CrossTenant-originalarrivaltime: 27 Jun 2024 09:56:24.8481 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 53d82571-da19-47e4-9cb4-625a166a4a2a X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: Qf+WAxzkWaoe719AKSf1rcotQycd6tVQdtu6bpSm91HhTTIrsVN/TqdUY1mCy84tutbjyVDLAMMMTpK5aQWB/BWENVq1+jYVopaPbJnc+Xo= X-MS-Exchange-Transport-CrossTenantHeadersStamped: TYCPR01MB6753 Hi Wolfram and Prabhakar, > -----Original Message----- > From: Prabhakar > Sent: Wednesday, June 26, 2024 2:24 PM > Subject: [PATCH v4 3/3] mmc: renesas_sdhi: Add support for RZ/V2H(P) SoC >=20 > From: Lad Prabhakar >=20 > The SDHI/eMMC IPs found in the RZ/V2H(P) (a.k.a. r9a09g057) are very simi= lar to those found in R- > Car Gen3. However, they are not identical, necessitating an SoC-specific = compatible string for > fine-tuning driver support. >=20 > Key features of the RZ/V2H(P) SDHI/eMMC IPs include: > - Voltage level control via the IOVS bit. > - PWEN pin support via SD_STATUS register. > - Lack of HS400 support. > - Fixed address mode operation. >=20 > internal regulator support is added to control the voltage levels of SD p= ins via sd_iovs/sd_pwen > bits in SD_STATUS register. >=20 > Signed-off-by: Lad Prabhakar > Tested-by: Claudiu Beznea # on RZ/G3S > --- > v3->v4 > - Dropped using 'renesas,sdhi-use-internal-regulator' property > - Now using of_device_is_available() to check if regulator is available a= nd enabled > - Dropped extra spaces during operations > - Included tested by tag from Claudiu > - Rebased patch on top of https://patchwork.kernel.org/project/linux-rene= sas- > soc/patch/20240626085015.32171-2-wsa+renesas@sang-engineering.com/ >=20 > v2->v3 > - Moved regulator info to renesas_sdhi_of_data instead of quirks > - Added support to configure the init state of regulator > - Added function pointers to configure regulator > - Added REGULATOR_CHANGE_VOLTAGE mask >=20 > v1->v2 > - Now controlling PWEN bit get/set_voltage > --- > drivers/mmc/host/renesas_sdhi.h | 13 ++ > drivers/mmc/host/renesas_sdhi_core.c | 98 ++++++++++++ > drivers/mmc/host/renesas_sdhi_internal_dmac.c | 147 ++++++++++++++++++ > drivers/mmc/host/tmio_mmc.h | 5 + > 4 files changed, 263 insertions(+) >=20 > diff --git a/drivers/mmc/host/renesas_sdhi.h b/drivers/mmc/host/renesas_s= dhi.h index > f12a87442338..cd509e7142ba 100644 > --- a/drivers/mmc/host/renesas_sdhi.h > +++ b/drivers/mmc/host/renesas_sdhi.h > @@ -11,6 +11,8 @@ >=20 > #include > #include > +#include > +#include > #include > #include "tmio_mmc.h" >=20 > @@ -36,6 +38,12 @@ struct renesas_sdhi_of_data { > unsigned int max_blk_count; > unsigned short max_segs; > unsigned long sdhi_flags; > + struct regulator_desc *rdesc; > + struct regulator_init_data *reg_init_data; > + bool regulator_init_state; > + unsigned int regulator_init_voltage; > + int (*regulator_force_endis)(struct regulator_dev *rdev, bool enable); > + int (*regulator_force_voltage)(struct regulator_dev *rdev, unsigned > +int voltage); > }; >=20 > #define SDHI_CALIB_TABLE_MAX 32 > @@ -95,6 +103,11 @@ struct renesas_sdhi { >=20 > struct reset_control *rstc; > struct tmio_mmc_host *host; > + > + bool use_internal_regulator; > + struct regulator_dev *internal_regulator; > + int (*regulator_force_endis)(struct regulator_dev *rdev, bool enable); > + int (*regulator_force_voltage)(struct regulator_dev *rdev, unsigned > +int voltage); > }; >=20 > #define host_to_priv(host) \ > diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/rene= sas_sdhi_core.c > index 0fc159b52fa9..6f8e745477b5 100644 > --- a/drivers/mmc/host/renesas_sdhi_core.c > +++ b/drivers/mmc/host/renesas_sdhi_core.c > @@ -581,12 +581,50 @@ static void renesas_sdhi_reset(struct tmio_mmc_host= *host, bool preserve) >=20 > if (!preserve) { > if (priv->rstc) { > + bool regulator_enabled; > + > + /* to restore back the internal regulator after reset make a copy of = it */ > + if (priv->use_internal_regulator) > + regulator_enabled =3D regulator_is_enabled(host->mmc->supply.vqmmc); On all other SoCs, SD power enable is GPIO and we define this as GPIO hog, = so that It always supply Vmmc(3.3V) to the card for Card detection. In this case, the SoC dedicated pin(PWEN) provides VMMC(3.3V). By reset thi= s value is always 1 (3.3V). So should we implement handling of PWEN bit as part of vqmmc regulator as it serves different functionality? If I understand correctly, VMMC(Always on 3.3V) for card detection -->PWEN pin Vqmmc(1.8v-3.3V) for UHS operation for voltage switch-->IOVS pin So according to me to implementing both the stuff in single regulator is not correct? Like GPIO hog, PWEN bit should always on, so that it always supply VMMC. What is your thoughts on this? Please correct me if I am wrong. Cheers, Biju