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Tue, 1 Apr 2025 06:54:33 +0000 From: "Emi Kisanuki (Fujitsu)" To: 'Oliver Upton' CC: 'Steven Price' , "'kvm@vger.kernel.org'" , "'kvmarm@lists.linux.dev'" , 'Catalin Marinas' , 'Marc Zyngier' , 'Will Deacon' , 'James Morse' , 'Suzuki K Poulose' , 'Zenghui Yu' , "'linux-arm-kernel@lists.infradead.org'" , "'linux-kernel@vger.kernel.org'" , 'Joey Gouly' , 'Alexandru Elisei' , 'Christoffer Dall' , 'Fuad Tabba' , "'linux-coco@lists.linux.dev'" , 'Ganapatrao Kulkarni' , 'Gavin Shan' , 'Shanker Donthineni' , 'Alper Gun' , "'Aneesh Kumar K . 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charset="iso-2022-jp" Content-Transfer-Encoding: quoted-printable Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-Exchange-AntiSpam-ExternalHop-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-ExternalHop-MessageData-0: CiQOUS6V1Kfr8qnk+W5IkYVf4QoOPHD51eaF0KeqYqMBEcyDDeAENt6h99sO/92knlhxKeEIQxSfd/gV7coill1OQ7StvXURFKQCcpZjnxfgHgcJar9WpwE1pIJzfQmCWiAGq3vUbcBWYo4hrBt9ByU1zH64gT2XxL/U40rz2mQrpEy7Kp9Bi0hJepvaIvaFd9mcBe55EF4MoIkZ00UQ3C7N98ubUdO4JZfUNbfumJ7DmxtSsCro3eV29M/ksiAUQ9kYv5CCyOakxpNZduHAZIBYfSD3I1eyT8lTIcnlUseC8cmaTpWYFdEuWvOEzWSoUPOU9NqCycAnH4BRKhrLNyBHz+qTEZnnmRepkXfNDaYYnvRDUbXNuAGZKu3NQhRirxqFlC1Jldc/fZuF0fhQdW3bV7vA95QBgLuI6fLYu3X12TS8fsI7anMnFLPyCXi5tSVQd5uuFyyG1rXuHwhNW0LBPw8Vx5KqT/lcIzic+sRJKqQkdwViFBZbCn12ca8EogqTARUYubc58fUBy8KpBXx1T6XNKDSRZseAXJe3AvMWKScIEXkOobfzdEmjN+fUJ8XFr7rPejJ7lcbfcH2Dn4gOsYY0AtQC4ooDY6psSLa3lgROFiyvPI9C7o5Ax1xB X-OriginatorOrg: fujitsu.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: TYCPR01MB11463.jpnprd01.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 2d082537-5970-404b-15ea-08dd70ea0eab X-MS-Exchange-CrossTenant-originalarrivaltime: 01 Apr 2025 06:54:32.6999 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a19f121d-81e1-4858-a9d8-736e267fd4c7 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: trIAVd3XUyjqQpTRTQA1Mx0jT5koSSnP1XgIJZxeSb31Nc3rdX0bVjS+0MD+funSqJTaTBu2Ylqx7GMo1ya+JPPwVLjDGyM11eut4sEWeE8= X-MS-Exchange-Transport-CrossTenantHeadersStamped: TYWPR01MB11326 > Hi Emi, >=20 > On Wed, Mar 26, 2025 at 02:14:35AM +0000, Emi Kisanuki (Fujitsu) wrote: > > Hi all, > > > > I tested Linux-cca cca-host/v7 patch with our Internal simulator based = on > QEMU (with CCA and MPAM support). > > A panic occurred when starting Realm, but I don't think this is a probl= em with the > cca-host/v7 patch. > > The location of the panic is [1]. > > > > [1]https://lore.kernel.org/linux-arm-kernel/20241030160317.2528209-4-j > > oey.gouly@arm.com diff --git a/arch/arm64/kernel/cpuinfo.c > > b/arch/arm64/kernel/cpuinfo.c index 44718d0482b3..46ba30d42b9b 100644 > > --- a/arch/arm64/kernel/cpuinfo.c > > +++ b/arch/arm64/kernel/cpuinfo.c > > @@ -478,6 +478,9 @@ static void __cpuinfo_store_cpu(struct cpuinfo_arm6= 4 > *info) > > if (id_aa64pfr0_32bit_el0(info->reg_id_aa64pfr0)) > > __cpuinfo_store_cpu_32bit(&info->aarch32); > > > > + if (id_aa64pfr0_mpam(info->reg_id_aa64pfr0)) > > + info->reg_mpamidr =3D read_cpuid(MPAMIDR_EL1); /////// > panic occurred here. > > + > > cpuinfo_detect_icache_policy(info); > > } > > > > There was no problem with the cca-host/v5 patch (based on v6.12). > > This panic is caused by accessing MPAMIDR_EL1 when the chip supports > MPAM. > > This functionality was enabled when the cca host patch base version was > rebased from v6.12 to v6.13. > > > > I am not familiar with TF-A, but I think this maybe a TF-A's bug. > > Because It seems TF-A sets MPAM3_EL3.TRAPLOWER to 0 during normal > guest boot in manage_extensions_nonsecure_per_world function[2]. > > However, TF-A does not set it to 0 during Realm guest boot in > manage_extensions_secure_per_world function. > > Therefore, a trap occurs against EL3 (TF-A), and it is likely being pro= cessed as > an invalid instruction (Undef). >=20 > Your instinct is correct that this is *not* a kernel bug. It is the respo= nsibility of the > RMM to provide a consistent feature set to the Realm. >=20 > Looks like this was addressed recently in TF-RMM by hiding FEAT_MPAM: >=20 > https://github.com/TF-RMM/tf-rmm/commit/7b0874403726d215c40054abfd5d > 8704049f8dac >=20 > Thanks, > Oliver Hi Oliver Thank you.=20 We will backport the patch you mentioned. I have verified the following 1. Launching the realm VM using Internal simulator =1B$B"*=1B(B Successfull= y launched by disabling MPAM support in the ID register. 2. Running kvm-unit-tests (with lkvm) =1B$B"*=1B(B All tests passed except = for PMU (as expected, since PMU is not supported by the Internal simulator)= .[1] Tested-by: Emi Kisanuki [1] https://gitlab.arm.com/linux-arm/kvm-unit-tests-cca cca/v3 Best Regards, Emi Kisanuki