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b=pQIC/OIvCklA8x+okTWKmCMHhnBpFmT0O693NRLu8zqwiQplm1KjeTzbflRZx029/hJsVyu7fNJVjyCobfKObb5Xgk4/mjdTBFTiIs0VD2EmHi+8eiVE8ez9oLMEcxf2aZJYV2oDB2yDxVrbQtfuK54pa90bJfafOlxuDS7nGkk= Received: from TYCSPRMB0009.jpnprd01.prod.outlook.com (2603:1096:400:18f::5) by TYAPR01MB5449.jpnprd01.prod.outlook.com (2603:1096:404:8038::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8678.23; Wed, 23 Apr 2025 13:46:46 +0000 Received: from TYCSPRMB0009.jpnprd01.prod.outlook.com ([fe80::8f8f:14d6:a759:4c66]) by TYCSPRMB0009.jpnprd01.prod.outlook.com ([fe80::8f8f:14d6:a759:4c66%6]) with mapi id 15.20.8655.033; Wed, 23 Apr 2025 13:46:46 +0000 From: Fabrizio Castro To: Vinod Koul CC: Geert Uytterhoeven , Magnus Damm , Wolfram Sang , Prabhakar Mahadev Lad , =?iso-8859-1?Q?Uwe_Kleine-K=F6nig?= , Biju Das , "dmaengine@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-renesas-soc@vger.kernel.org" , "tglx@linutronix.de" Subject: RE: [PATCH v6 5/6] dmaengine: sh: rz-dmac: Add RZ/V2H(P) support Thread-Topic: [PATCH v6 5/6] dmaengine: sh: rz-dmac: Add RZ/V2H(P) support Thread-Index: AQHbs62Wf/Y/Cx7CZEqSG0MzEkw3v7OxO6CAgAADv0A= Date: Wed, 23 Apr 2025 13:46:46 +0000 Message-ID: References: <20250422173937.3722875-1-fabrizio.castro.jz@renesas.com> <20250422173937.3722875-6-fabrizio.castro.jz@renesas.com> In-Reply-To: Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=renesas.com; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-OriginatorOrg: renesas.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: TYCSPRMB0009.jpnprd01.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: a761737c-52dd-4eaf-288f-08dd826d4a01 X-MS-Exchange-CrossTenant-originalarrivaltime: 23 Apr 2025 13:46:46.0891 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 53d82571-da19-47e4-9cb4-625a166a4a2a X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: aFKk7YGbN7f0onrdXEIgyq/bTrFN5IuZ2CRBYVBSkPc0Tmqna/RPp7nDJ4IwQN48ml1z4miKhfr3PU7QmcCdnW7JC+qrIVIpnS2KbI+mcEU= X-MS-Exchange-Transport-CrossTenantHeadersStamped: TYAPR01MB5449 Hi Vinod, Thanks for your feedback! > From: Vinod Koul > Sent: 23 April 2025 14:13 > Subject: Re: [PATCH v6 5/6] dmaengine: sh: rz-dmac: Add RZ/V2H(P) support >=20 > On 22-04-25, 18:39, Fabrizio Castro wrote: > > The DMAC IP found on the Renesas RZ/V2H(P) family of SoCs is > > similar to the version found on the Renesas RZ/G2L family of > > SoCs, but there are some differences: > > * It only uses one register area > > * It only uses one clock > > * It only uses one reset > > * Instead of using MID/IRD it uses REQ No > > * It is connected to the Interrupt Control Unit (ICU) > > * On the RZ/G2L there is only 1 DMAC, on the RZ/V2H(P) there are 5 > > > > Add specific support for the Renesas RZ/V2H(P) family of SoC by > > tackling the aforementioned differences. > > > > Signed-off-by: Fabrizio Castro > > Reviewed-by: Lad Prabhakar > > Reviewed-by: Geert Uytterhoeven > > --- > > v5->v6: > > * Collected tags. > > v4->v5: > > * Reused RZ/G2L cell specification (with REQ No in place of MID/RID). > > * Dropped ACK No. > > * Removed mid_rid/req_no/ack_no union and reused mid_rid for REQ No. > > * Other small improvements. > > v3->v4: > > * Fixed an issue with mid_rid/req_no/ack_no initialization > > v2->v3: > > * Dropped change to Kconfig. > > * Replaced rz_dmac_type with has_icu flag. > > * Put req_no and ack_no in an anonymous struct, nested under an > > anonymous union with mid_rid. > > * Dropped data field of_rz_dmac_match[], and added logic to determine > > value of has_icu flag from DT parsing. > > v1->v2: > > * Switched to new macros for minimum values. > > --- > > drivers/dma/sh/rz-dmac.c | 81 ++++++++++++++++++++++++++++++++++++---- > > 1 file changed, 74 insertions(+), 7 deletions(-) > > > > diff --git a/drivers/dma/sh/rz-dmac.c b/drivers/dma/sh/rz-dmac.c > > index d7a4ce28040b..1f687b08d6b8 100644 > > --- a/drivers/dma/sh/rz-dmac.c > > +++ b/drivers/dma/sh/rz-dmac.c > > @@ -14,6 +14,7 @@ > > #include > > #include > > #include > > +#include >=20 > This does not exist for me or in the patches that was sent to me. I have > dropped this series due to build failure after picking up dmaengine > patches >=20 > drivers/dma/sh/rz-dmac.c:17:10: fatal error: linux/irqchip/irq-renesas-rz= v2h.h: No such file or > directory Sorry about that. This DMA to work needs access to some ICU features, which are part of this = series, however somehow I didn't send you those patches. Apologies. I'll send a new version of this series shortly (because there are some mino= r improvements to the dt-bindings that I would like to make, to address the l= ast comments from Geert. It should all be good to go after that as everything h= as been reviewed by the relevant maintainers already), and I'll make sure to s= end the whole series to you. I am assuming you'll also be taking the ICU related changes as suggested by Thomas: https://lore.kernel.org/linux-renesas-soc/87a5ajk7hr.ffs@tglx/ Thanks! Cheers, Fab >=20 > -- > ~Vinod