From: Greg KH <gregkh@linuxfoundation.org>
To: mgross@linux.intel.com
Cc: markgross@kernel.org, arnd@arndb.de, bp@suse.de,
damien.lemoal@wdc.com, dragan.cvetic@xilinx.com, corbet@lwn.net,
leonard.crestez@nxp.com, palmerdabbelt@google.com,
paul.walmsley@sifive.com, peng.fan@nxp.com, robh+dt@kernel.org,
shawnguo@kernel.org, linux-kernel@vger.kernel.org,
Srikanth Thokala <srikanth.thokala@intel.com>
Subject: Re: [PATCH 09/22] misc: xlink-pcie: lh: Add core communication logic
Date: Wed, 2 Dec 2020 07:18:14 +0100 [thread overview]
Message-ID: <X8cxpqf7MMCNacqm@kroah.com> (raw)
In-Reply-To: <20201201223511.65542-10-mgross@linux.intel.com>
On Tue, Dec 01, 2020 at 02:34:58PM -0800, mgross@linux.intel.com wrote:
> From: Srikanth Thokala <srikanth.thokala@intel.com>
>
> Add logic to establish communication with the remote host which is through
> ring buffer management and MSI/Doorbell interrupts
>
> Reviewed-by: Mark Gross <mgross@linux.intel.com>
> Signed-off-by: Srikanth Thokala <srikanth.thokala@intel.com>
> ---
> drivers/misc/xlink-pcie/local_host/Makefile | 2 +
> drivers/misc/xlink-pcie/local_host/core.c | 894 ++++++++++++++++++++
> drivers/misc/xlink-pcie/local_host/core.h | 247 ++++++
> drivers/misc/xlink-pcie/local_host/epf.c | 116 ++-
> drivers/misc/xlink-pcie/local_host/epf.h | 26 +
> drivers/misc/xlink-pcie/local_host/util.c | 375 ++++++++
> drivers/misc/xlink-pcie/local_host/util.h | 70 ++
> drivers/misc/xlink-pcie/local_host/xpcie.h | 65 ++
> include/linux/xlink_drv_inf.h | 60 ++
> 9 files changed, 1847 insertions(+), 8 deletions(-)
> create mode 100644 drivers/misc/xlink-pcie/local_host/core.c
> create mode 100644 drivers/misc/xlink-pcie/local_host/core.h
> create mode 100644 drivers/misc/xlink-pcie/local_host/util.c
> create mode 100644 drivers/misc/xlink-pcie/local_host/util.h
> create mode 100644 include/linux/xlink_drv_inf.h
>
> diff --git a/drivers/misc/xlink-pcie/local_host/Makefile b/drivers/misc/xlink-pcie/local_host/Makefile
> index 54fc118e2dd1..28761751d43b 100644
> --- a/drivers/misc/xlink-pcie/local_host/Makefile
> +++ b/drivers/misc/xlink-pcie/local_host/Makefile
> @@ -1,3 +1,5 @@
> obj-$(CONFIG_XLINK_PCIE_LH_DRIVER) += mxlk_ep.o
> mxlk_ep-objs := epf.o
> mxlk_ep-objs += dma.o
> +mxlk_ep-objs += core.o
> +mxlk_ep-objs += util.o
> diff --git a/drivers/misc/xlink-pcie/local_host/core.c b/drivers/misc/xlink-pcie/local_host/core.c
> new file mode 100644
> index 000000000000..aecaaa783153
> --- /dev/null
> +++ b/drivers/misc/xlink-pcie/local_host/core.c
> @@ -0,0 +1,894 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*****************************************************************************
> + *
> + * Intel Keem Bay XLink PCIe Driver
> + *
> + * Copyright (C) 2020 Intel Corporation
> + *
> + ****************************************************************************/
> +
> +#include <linux/of_reserved_mem.h>
> +
> +#include "epf.h"
> +#include "core.h"
> +#include "util.h"
> +
> +static struct xpcie *global_xpcie;
> +
> +static int rx_pool_size = SZ_32M;
> +module_param(rx_pool_size, int, 0664);
> +MODULE_PARM_DESC(rx_pool_size, "receiving pool size (default 32 MiB)");
> +
> +static int tx_pool_size = SZ_32M;
> +module_param(tx_pool_size, int, 0664);
> +MODULE_PARM_DESC(tx_pool_size, "transmitting pool size (default 32 MiB)");
> +
> +static int fragment_size = XPCIE_FRAGMENT_SIZE;
> +module_param(fragment_size, int, 0664);
> +MODULE_PARM_DESC(fragment_size, "transfer descriptor size (default 128 KiB)");
> +
> +static bool tx_pool_coherent = true;
> +module_param(tx_pool_coherent, bool, 0664);
> +MODULE_PARM_DESC(tx_pool_coherent,
> + "transmitting pool using coherent memory (default true)");
> +
> +static bool rx_pool_coherent;
> +module_param(rx_pool_coherent, bool, 0664);
> +MODULE_PARM_DESC(rx_pool_coherent,
> + "receiving pool using coherent memory (default false)");
This isn't the 1990's anymore. Please make these dynamic such that they
are never needed (the code figures out the best values), or on some
per-device basis using configfs or sysfs.
thanks,
greg k-h
next prev parent reply other threads:[~2020-12-02 6:17 UTC|newest]
Thread overview: 68+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-01 22:34 [PATCH 00/22] Intel Vision Processing Unit base enabling part 1 mgross
2020-12-01 22:34 ` [PATCH 01/22] Add Vision Processing Unit (VPU) documentation mgross
2020-12-18 23:30 ` Randy Dunlap
2021-01-07 20:16 ` mark gross
2020-12-01 22:34 ` [PATCH 02/22] dt-bindings: Add bindings for Keem Bay IPC driver mgross
2020-12-07 16:01 ` Rob Herring
2020-12-07 18:22 ` mark gross
2020-12-07 18:42 ` Daniele Alessandrelli
2020-12-07 20:31 ` Jassi Brar
2020-12-09 0:12 ` mark gross
2020-12-09 16:49 ` Jassi Brar
2020-12-09 17:33 ` Rob Herring
2020-12-01 22:34 ` [PATCH 03/22] keembay-ipc: Add Keem Bay IPC module mgross
2020-12-02 6:16 ` Greg KH
2020-12-02 17:42 ` mark gross
2020-12-02 19:01 ` Greg KH
2020-12-05 3:35 ` mark gross
2020-12-05 8:40 ` Greg KH
2020-12-05 16:37 ` Gross, Mark
2020-12-07 1:36 ` mark gross
2020-12-02 6:19 ` Greg KH
2020-12-08 18:59 ` Daniele Alessandrelli
2020-12-08 19:48 ` Greg KH
2020-12-10 18:38 ` Daniele Alessandrelli
2020-12-11 8:22 ` Greg KH
2020-12-11 17:26 ` Gross, Mark
2020-12-01 22:34 ` [PATCH 04/22] dt-bindings: Add bindings for Keem Bay VPU IPC driver mgross
2020-12-07 15:57 ` Rob Herring
2020-12-07 21:28 ` mark gross
2020-12-01 22:34 ` [PATCH 05/22] keembay-vpu-ipc: Add Keem Bay VPU IPC module mgross
2020-12-01 22:34 ` [PATCH 06/22] misc: xlink-pcie: Add documentation for XLink PCIe driver mgross
2020-12-18 22:59 ` Randy Dunlap
2020-12-19 0:07 ` mark gross
2020-12-01 22:34 ` [PATCH 07/22] misc: xlink-pcie: lh: Add PCIe EPF driver for Local Host mgross
2020-12-01 22:34 ` [PATCH 08/22] misc: xlink-pcie: lh: Add PCIe EP DMA functionality mgross
2020-12-01 22:34 ` [PATCH 09/22] misc: xlink-pcie: lh: Add core communication logic mgross
2020-12-02 6:18 ` Greg KH [this message]
2020-12-02 16:46 ` Thokala, Srikanth
2020-12-01 22:34 ` [PATCH 10/22] misc: xlink-pcie: lh: Prepare changes for adding remote host driver mgross
2020-12-01 22:35 ` [PATCH 11/22] misc: xlink-pcie: rh: Add PCIe EP driver for Remote Host mgross
2020-12-01 22:35 ` [PATCH 12/22] misc: xlink-pcie: rh: Add core communication logic mgross
2020-12-01 22:35 ` [PATCH 13/22] misc: xlink-pcie: Add XLink API interface mgross
2020-12-01 22:35 ` [PATCH 14/22] misc: xlink-pcie: Add asynchronous event notification support for XLink mgross
2020-12-01 22:35 ` [PATCH 15/22] xlink-ipc: Add xlink ipc device tree bindings mgross
2020-12-07 15:58 ` Rob Herring
2020-12-07 21:41 ` mark gross
2020-12-01 22:35 ` [PATCH 16/22] xlink-ipc: Add xlink ipc driver mgross
2020-12-07 2:32 ` Joe Perches
2020-12-11 11:33 ` Kelly, Seamus
2020-12-11 12:14 ` gregkh
2020-12-11 17:12 ` Gross, Mark
2020-12-07 19:53 ` Randy Dunlap
2020-12-01 22:35 ` [PATCH 17/22] xlink-core: Add xlink core device tree bindings mgross
2020-12-07 16:02 ` Rob Herring
2020-12-01 22:35 ` [PATCH 18/22] xlink-core: Add xlink core driver xLink mgross
2020-12-07 21:50 ` Randy Dunlap
2020-12-01 22:35 ` [PATCH 19/22] xlink-core: Enable xlink protocol over pcie mgross
2020-12-01 22:35 ` [PATCH 20/22] xlink-core: Enable VPU IP management and runtime control mgross
2020-12-01 22:35 ` [PATCH 21/22] xlink-core: add async channel and events mgross
2020-12-07 2:55 ` Joe Perches
2020-12-11 11:34 ` Kelly, Seamus
2020-12-01 22:35 ` [PATCH 22/22] xlink-core: factorize xlink_ioctl function by creating sub-functions for each ioctl command mgross
2020-12-07 3:05 ` Joe Perches
2020-12-07 21:59 ` mark gross
2020-12-09 8:30 ` Joe Perches
2020-12-11 11:36 ` Kelly, Seamus
-- strict thread matches above, loose matches on Subject: below --
2020-11-30 23:06 [PATCH 00/22] Intel Vision Processing Unit base enabling part 1 mgross
2020-11-30 23:06 ` [PATCH 09/22] misc: xlink-pcie: lh: Add core communication logic mgross
2020-12-01 10:15 ` Greg Kroah-Hartman
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